#!/ciena/bin/regdecode64 0x00011F0000000000

[PCI_BAR1_INDEX0]
offset: 0x1104
width: 32

[PCI_BAR1_INDEX1]
offset: 0x1100
width: 32

[PCI_BAR1_INDEX2]
offset: 0x110c
width: 32

[PCI_BAR1_INDEX3]
offset: 0x1108
width: 32

[PCI_BAR1_INDEX4]
offset: 0x1114
width: 32

[PCI_BAR1_INDEX5]
offset: 0x1110
width: 32

[PCI_BAR1_INDEX6]
offset: 0x111c
width: 32

[PCI_BAR1_INDEX7]
offset: 0x1118
width: 32

[PCI_BAR1_INDEX8]
offset: 0x1124
width: 32

[PCI_BAR1_INDEX9]
offset: 0x1120
width: 32

[PCI_BAR1_INDEX10]
offset: 0x112c
width: 32

[PCI_BAR1_INDEX11]
offset: 0x1128
width: 32

[PCI_BAR1_INDEX12]
offset: 0x1134
width: 32

[PCI_BAR1_INDEX13]
offset: 0x1130
width: 32

[PCI_BAR1_INDEX14]
offset: 0x113c
width: 32

[PCI_BAR1_INDEX15]
offset: 0x1138
width: 32

[PCI_BAR1_INDEX16]
offset: 0x1144
width: 32

[PCI_BAR1_INDEX17]
offset: 0x1140
width: 32

[PCI_BAR1_INDEX18]
offset: 0x114c
width: 32

[PCI_BAR1_INDEX19]
offset: 0x1148
width: 32

[PCI_BAR1_INDEX20]
offset: 0x1154
width: 32

[PCI_BAR1_INDEX21]
offset: 0x1150
width: 32

[PCI_BAR1_INDEX22]
offset: 0x115c
width: 32

[PCI_BAR1_INDEX23]
offset: 0x1158
width: 32

[PCI_BAR1_INDEX24]
offset: 0x1164
width: 32

[PCI_BAR1_INDEX25]
offset: 0x1160
width: 32

[PCI_BAR1_INDEX26]
offset: 0x116c
width: 32

[PCI_BAR1_INDEX27]
offset: 0x1168
width: 32

[PCI_BAR1_INDEX28]
offset: 0x1174
width: 32

[PCI_BAR1_INDEX29]
offset: 0x1170
width: 32

[PCI_BAR1_INDEX30]
offset: 0x117c
width: 32

[PCI_BAR1_INDEX31]
offset: 0x1178
width: 32

[PCI_READ_CMD_6]
offset: 0x1184
width: 32

[PCI_READ_CMD_C]
offset: 0x1180
width: 32

[PCI_READ_CMD_E]
offset: 0x118C
width: 32

[PCI_CTL_STATUS_2]
offset: 0x1188
width: 32

[NPI_MSI_RCV]
offset: 0x1190
width: 32

[PCI_INT_SUM2]
offset: 0x1198
width: 32

[PCI_INT_ENB2]
offset: 0x11A0
width: 32

[PCI_SCM_REG]
offset: 0x11A8
width: 32

[PCI_TSR_REG]
offset: 0x11B0
width: 32
