5.6. DLINK_CFG
When using DM3 boards, the DLINK_CFG data structure is not supported.
When using Springware boards, the DLINK_CFG structure contains information about the data link logical link configuration block.
The structure is defined as follows:
typedef struct
{
char tei;
int state;
int protocol;
} DLINK_CFG, *DLINK_CFG_PTR;
Table 46. DLINK_CFG Field Descriptions
|
Field
|
Description
|
| tei |
Terminal Endpoint Identifier. Valid values are:
- 0 - 63 - for manual TEIs (chosen by the user side)
- AUTO_TEI - for automatic TEIs (chosen by the network side)
|
| state |
The original state in which the logical link should be configured. Valid values are:
- DATA_LINK_UP - the firmware will attempt to activate the logical link if it is not already activated and will allow the network side to establish the logical link if requested.
- DATA_LINK_DOWN - the firmware will attempt to release the logical link if it is currently established. The firmware will allow the network side to establish the logical link if requested.
- DATA_LINK_DISABLED - the firmware will attempt to release the logical link if it is currently established. The firmware will not allow the network side to establish the logical link if requested.
|
| protocol |
The protocol to be used on this logical link. For instance:
- DATA_LINK_PROTOCOL_Q931 - indicates that the link is to be used as an ISDN connection-oriented logical link.
- DATA_LINK_PROTOCOL_X25 - indicates that the link is to be used as an X.25 packet-switched link.
|