MS_CADENCE

---

typedef struct ms_cadence {
   BYTE cadid;       // Cadence ID, 1-MS_MAX_CADID
   BYTE cadlength;   // Cadence Length
   BYTE *cadpattern; // Pointer to Cadence Pattern
} MS_CADENCE; 

Description

MS_CADENCE is used by the ms_getbrdparm( ) and ms_setbrdparm( ) functions when manipulating the MSG_DISTINCTRNG parameter. The structure contains cadence setting information used for initializing a distinctive ring cadence.

Notes:

1. Distinctive ring and board-level ring cadence are mutually exclusive except in the case where the cadence lengths are identical. You will get an E_MSRNGCADCNFLCT error if the MSG_PDRNGCAD or MSG_UDRNGCAD board-level ring cadence is currently set to a cadence that does not match the distinctive ring cadence length. For example, if MSG_UDRNGCAD is set to a cadence length of 4, you cannot initialize distinctive ring Group A, which uses a length of 6 seconds.
2. You cannot remove, change, or overwrite the distinctive ring definition once a pattern has been assigned to a cadence ID.

For MSI boards only: when a ring cycle shorter than the default cycle of 6 seconds (2 seconds ON, 4 seconds OFF) is desired, the RING.PRM parameter file must be downloaded and edited to define a new default active cycle length. A valid range of active cycle lengths is from 1 - 6 seconds. For more information, see the DCM on-line help.

Field Descriptions

The fields of the MS_CADENCE data structure are described as follows:

cadid

Assigns a cadence ID to the pattern. Range: 1 - 8. Returns an E_MSBADRNGCAD error if outside the range.

cadlength

This must be set to MS_RNGA_CADLEN, which is a cadence length of 6-seconds, to initialize a cadence pattern from Table  7, "Ring Cadence Group A".

cadpattern

The user may specify any cadence pattern, subject to the same restrictions as detailed under MSG_UDRNGCAD. However, if the board-wide cadence length has the default value of 6 seconds, the user may specify one of the predefined patterns in Table 7, or a cadence pattern may be defined by the user.

Table 7. Ring Cadence Group A

Cadence Pattern Name	Ring Cadence Pattern (in seconds)
MS_RNGA_TWOSEC	2 on, 4 off
MS_RNGA_ONESEC	1 on, 5 off
MS_RNGA_SPLASH1	.5 on, 5.5 off
MS_RNGA_SPLASH2	.5 on, .25 off, .5 on, 4.75 off
MS_RNGA_SPLASH3	.5 on, .25 off, .5 on, .25 off, .5 on, 4 off
MS_RNGA_SPLASH4	.25 on, .25 off, .25 on, .25 off, .25 on, .25 off, .25 on, 4.25 off
MS_RNGA_LONGSHORT	1.25 on, .25 off, .5 on, 4 off
MS_RNGA_SHORTLONG	.5 on, .25 off, 1.25 on, 4 off

Notes:

1. MS_RNGA_SPLASH3 and MS_RNGA_SPLASH4 are not supported on DM3 boards.
2. The splash ring cycles apply to the MSI/SC boards. They do not apply to the PCI version.

Click here to contact Telecom Support Resources