40 #ifndef OPENAPI_BST_H_INCLUDED
41 #define OPENAPI_BST_H_INCLUDED
51 #define OPEN_ASIC_ICOS_MAX_PORTS 300
52 #define OPEN_ASIC_MAX_PORTS OPEN_ASIC_ICOS_MAX_PORTS
55 #define OPEN_ASIC_ICOS_BST_MAX_PORTS 300
56 #define OPEN_ASIC_BST_MAX_PORTS OPEN_ASIC_ICOS_BST_MAX_PORTS
58 #define OPEN_ASIC_MAX_UC_QUEUES 16384
60 #define OPEN_ASIC_MAX_UC_QUEUE_GROUPS 4096
62 #define OPEN_ASIC_MAX_MC_QUEUES 1040
64 #define OPEN_ASIC_MAX_SERVICE_POOLS 4
66 #define OPEN_ASIC_MAX_COMMON_POOLS 1
68 #define OPEN_ASIC_MAX_CPU_QUEUES 8
70 #define OPEN_ASIC_MAX_RQE_QUEUES 11
72 #define OPEN_ASIC_MAX_RQE_QUEUE_POOLS 4
74 #define OPEN_ASIC_MAX_PRIORITY_GROUPS 8
76 #define OPEN_SYSTEM_NUM_COS_PORT 8
79 #define OPEN_ASIC_MAX_INGRESS_SERVICE_POOLS \
80 (OPEN_ASIC_MAX_SERVICE_POOLS + OPEN_ASIC_MAX_COMMON_POOLS)
82 #define OPEN_ASIC_MAX_UC_MC_QUEUES (OPEN_ASIC_MAX_UC_QUEUES + OPEN_ASIC_MAX_MC_QUEUES)
84 #define OPEN_BST_INVALID_THRESHOLD_FIELD_32 0xFFFFFFFF
85 #define OPEN_BST_INVALID_THRESHOLD_FIELD 0xFFFFFFFFFFFFFFFFLL
124 uint64_t bufferCount;
132 uint32_t umShareBufferCount;
133 uint32_t umHeadroomBufferCount;
143 uint32_t umShareBufferCount;
153 uint64_t umShareBufferCount;
163 uint32_t ucShareBufferCount;
164 uint32_t umShareBufferCount;
165 uint32_t mcShareBufferCount;
166 uint32_t mcShareQueueEntries;
176 uint64_t umShareBufferCount;
177 uint64_t mcShareBufferCount;
178 uint64_t mcShareQueueEntries;
188 uint64_t ucBufferCount;
190 } data[OPEN_ASIC_MAX_UC_MC_QUEUES];
199 uint64_t ucBufferCount;
209 uint64_t mcBufferCount;
210 uint64_t mcQueueEntries;
212 } data[OPEN_ASIC_MAX_UC_MC_QUEUES];
221 uint64_t cpuBufferCount;
222 uint64_t cpuQueueEntries;
232 uint64_t rqeBufferCount;
233 uint64_t rqeQueueEntries;
285 OPEN_BST_MODE_CURRENT = 1,
286 OPEN_BST_MODE_PEAK = 2
297 bool enableIngressStatsMonitoring;
298 bool enableEgressStatsMonitoring;
308 OPEN_BST_TRIGGER_DEVICE = 1,
309 OPEN_BST_TRIGGER_INGRESS = 2,
310 OPEN_BST_TRIGGER_EGRESS = 4
313 #define BVIEW_MAX_STRING_NAME_LEN 256
317 char realm[BVIEW_MAX_STRING_NAME_LEN];
318 char counter[BVIEW_MAX_STRING_NAME_LEN];
326 uint64_t ucShareThreshold;
327 uint64_t umShareThreshold;
328 uint64_t mcShareThreshold;
329 uint64_t mcShareQueueEntriesThreshold;
341 uint64_t umShareThreshold;
342 uint64_t umHeadroomThreshold;
348 uint64_t umShareThreshold;
354 uint64_t umShareThreshold;
360 uint64_t umShareThreshold;
361 uint64_t mcShareThreshold;
367 uint64_t ucBufferThreshold;
373 uint64_t ucBufferThreshold;
379 uint64_t mcBufferThreshold;
380 uint64_t mcQueueThreshold;
386 uint64_t cpuBufferThreshold;
387 uint64_t cpuQueueThreshold;
393 uint64_t rqeBufferThreshold;
394 uint64_t rqeQueueThreshold;
414 OPEN_BST_DEVICE_THRESHOLD = 1,
415 OPEN_BST_EGRESS_PORT_SP_THRESHOLD,
416 OPEN_BST_EGRESS_SP_THRESHOLD,
417 OPEN_BST_EGRESS_UC_QUEUE_THRESHOLD,
418 OPEN_BST_EGRESS_UC_QUEUEGROUPS_THRESHOLD,
419 OPEN_BST_EGRESS_MC_QUEUE_THRESHOLD,
420 OPEN_BST_EGRESS_CPU_QUEUE_THRESHOLD,
421 OPEN_BST_EGRESS_RQE_QUEUE_THRESHOLD,
422 OPEN_BST_INGRESS_PORT_PG_THRESHOLD,
423 OPEN_BST_INGRESS_PORT_SP_THRESHOLD,
424 OPEN_BST_INGRESS_SP_THRESHOLD
805 int asic,
int port,
int pg,
825 int asic,
int port,
int sp,
873 int asic,
int port,
int sp,
918 int asic,
int ucQueue,
945 int asic,
int ucQueueGrp,
964 int asic,
int mcQueue,
983 int asic,
int cpuQueue,
1002 int asic,
int rqeQueue,
1180 int asic,
int port,
int queue,
1181 uint64_t *dropCount);
1200 int asic,
int port,
int queue,
1201 uint64_t *dropCount);
1219 uint64_t *dropCount);
1258 int asic,
int realmMask,
1294 int asic,
int realmMask,