Open Ethernet Networking (OpEN) API Guide and Reference Manual  3.4.4.5
openapi_instru_bst.h
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1 
9 /*********************************************************************
10 *
11 * Copyright 2016-2018 Broadcom.
12 *
13 * Licensed under the Apache License, Version 2.0 (the "License");
14 * you may not use this file except in compliance with the License.
15 * You may obtain a copy of the License at
16 *
17 * http://www.apache.org/licenses/LICENSE-2.0
18 *
19 * Unless required by applicable law or agreed to in writing, software
20 * distributed under the License is distributed on an "AS IS" BASIS,
21 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 * See the License for the specific language governing permissions and
23 * limitations under the License.
24 *
25 **********************************************************************
26 *
27 * @filename openapi_instru_bst.h
28 *
29 * @purpose Instrumentation Specific APIs
30 *
31 * @component OPEN
32 *
33 * @create 01/22/2015
34 *
35 * @end
36 *
37 **********************************************************************/
38 
39 
40 #ifndef OPENAPI_BST_H_INCLUDED
41 #define OPENAPI_BST_H_INCLUDED
42 #include <string.h>
43 #include <stdio.h>
44 #include <stdbool.h>
45 
46 #include "openapi_common.h"
47 
48 /* These data structures are used for OpEN API only */
49 
51 #define OPEN_ASIC_ICOS_MAX_PORTS 300
52 #define OPEN_ASIC_MAX_PORTS OPEN_ASIC_ICOS_MAX_PORTS
53 
55 #define OPEN_ASIC_ICOS_BST_MAX_PORTS 300
56 #define OPEN_ASIC_BST_MAX_PORTS OPEN_ASIC_ICOS_BST_MAX_PORTS
57 
58 #define OPEN_ASIC_MAX_UC_QUEUES 16384
59 
60 #define OPEN_ASIC_MAX_UC_QUEUE_GROUPS 4096
61 
62 #define OPEN_ASIC_MAX_MC_QUEUES 1040
63 
64 #define OPEN_ASIC_MAX_SERVICE_POOLS 4
65 
66 #define OPEN_ASIC_MAX_COMMON_POOLS 1
67 
68 #define OPEN_ASIC_MAX_CPU_QUEUES 8
69 
70 #define OPEN_ASIC_MAX_RQE_QUEUES 11
71 
72 #define OPEN_ASIC_MAX_RQE_QUEUE_POOLS 4
73 
74 #define OPEN_ASIC_MAX_PRIORITY_GROUPS 8
75 
76 #define OPEN_SYSTEM_NUM_COS_PORT 8
77 
79 #define OPEN_ASIC_MAX_INGRESS_SERVICE_POOLS \
80  (OPEN_ASIC_MAX_SERVICE_POOLS + OPEN_ASIC_MAX_COMMON_POOLS)
81 
82 #define OPEN_ASIC_MAX_UC_MC_QUEUES (OPEN_ASIC_MAX_UC_QUEUES + OPEN_ASIC_MAX_MC_QUEUES)
83 
84 #define OPEN_BST_INVALID_THRESHOLD_FIELD_32 0xFFFFFFFF
85 #define OPEN_BST_INVALID_THRESHOLD_FIELD 0xFFFFFFFFFFFFFFFFLL
86 
87 typedef struct
88 {
89  int portMap[OPEN_ASIC_ICOS_MAX_PORTS + 1];
90  int lportMap[OPEN_ASIC_ICOS_MAX_PORTS + 1];
92 
93 typedef struct
94 {
96  int numPorts;
120 
122 typedef struct
123 {
124  uint64_t bufferCount;
126 
128 typedef struct
129 {
131  {
132  uint32_t umShareBufferCount;
133  uint32_t umHeadroomBufferCount;
134  } data[OPEN_ASIC_BST_MAX_PORTS][OPEN_ASIC_MAX_PRIORITY_GROUPS];
135 
137 
139 typedef struct
140 {
142  {
143  uint32_t umShareBufferCount;
144  } data[OPEN_ASIC_BST_MAX_PORTS][OPEN_ASIC_MAX_INGRESS_SERVICE_POOLS];
145 
147 
149 typedef struct
150 {
152  {
153  uint64_t umShareBufferCount;
155 
157 
159 typedef struct
160 {
162  {
163  uint32_t ucShareBufferCount;
164  uint32_t umShareBufferCount;
165  uint32_t mcShareBufferCount;
166  uint32_t mcShareQueueEntries;
167  } data[OPEN_ASIC_BST_MAX_PORTS][OPEN_ASIC_MAX_SERVICE_POOLS];
168 
170 
172 typedef struct
173 {
175  {
176  uint64_t umShareBufferCount;
177  uint64_t mcShareBufferCount;
178  uint64_t mcShareQueueEntries;
180 
182 
184 typedef struct
185 {
187  {
188  uint64_t ucBufferCount;
189  uint64_t port;
190  } data[OPEN_ASIC_MAX_UC_MC_QUEUES];
191 
193 
195 typedef struct
196 {
198  {
199  uint64_t ucBufferCount;
201 
203 
205 typedef struct
206 {
208  {
209  uint64_t mcBufferCount;
210  uint64_t mcQueueEntries;
211  uint64_t port; /* to indicate the port number using this queue */
212  } data[OPEN_ASIC_MAX_UC_MC_QUEUES];
213 
215 
217 typedef struct
218 {
220  {
221  uint64_t cpuBufferCount;
222  uint64_t cpuQueueEntries;
223  } data[OPEN_ASIC_MAX_CPU_QUEUES];
224 
226 
228 typedef struct
229 {
231  {
232  uint64_t rqeBufferCount;
233  uint64_t rqeQueueEntries;
234  } data[OPEN_ASIC_MAX_RQE_QUEUES];
235 
237 
240 typedef struct
241 {
244 
249 
256 
258 
260 typedef struct
261 {
264 
269 
278 
280 
281 
283 typedef enum
284 {
285  OPEN_BST_MODE_CURRENT = 1,
286  OPEN_BST_MODE_PEAK = 2
288 
290 typedef struct
291 {
294 
297  bool enableIngressStatsMonitoring;
298  bool enableEgressStatsMonitoring;
299 
302 
304 
306 typedef enum
307 {
308  OPEN_BST_TRIGGER_DEVICE = 1,
309  OPEN_BST_TRIGGER_INGRESS = 2,
310  OPEN_BST_TRIGGER_EGRESS = 4
312 
313 #define BVIEW_MAX_STRING_NAME_LEN 256
314 /* Trigger info */
315 typedef struct
316 {
317  char realm[BVIEW_MAX_STRING_NAME_LEN];
318  char counter[BVIEW_MAX_STRING_NAME_LEN];
319  int port;
320  int queue;
322 
324 typedef struct
325 {
326  uint64_t ucShareThreshold;
327  uint64_t umShareThreshold;
328  uint64_t mcShareThreshold;
329  uint64_t mcShareQueueEntriesThreshold;
331 
333 typedef struct
334 {
335  uint64_t threshold;
337 
339 typedef struct
340 {
341  uint64_t umShareThreshold;
342  uint64_t umHeadroomThreshold;
344 
346 typedef struct
347 {
348  uint64_t umShareThreshold;
350 
352 typedef struct
353 {
354  uint64_t umShareThreshold;
356 
358 typedef struct
359 {
360  uint64_t umShareThreshold;
361  uint64_t mcShareThreshold;
363 
365 typedef struct
366 {
367  uint64_t ucBufferThreshold;
369 
371 typedef struct
372 {
373  uint64_t ucBufferThreshold;
375 
377 typedef struct
378 {
379  uint64_t mcBufferThreshold;
380  uint64_t mcQueueThreshold;
382 
384 typedef struct
385 {
386  uint64_t cpuBufferThreshold;
387  uint64_t cpuQueueThreshold;
389 
391 typedef struct
392 {
393  uint64_t rqeBufferThreshold;
394  uint64_t rqeQueueThreshold;
396 
398 typedef struct
399 {
400  bool ucastQValid;
401  bool mcastQValid;
402  int ucastHwQNum[OPEN_SYSTEM_NUM_COS_PORT];
403  int mcastHwQNum[OPEN_SYSTEM_NUM_COS_PORT];
405 
407 typedef struct
408 {
409  OPEN_SYSTEM_PORT_COSQ_HWQ_MAP_t portInfo[OPEN_ASIC_MAX_PORTS + 1];
411 
414  OPEN_BST_DEVICE_THRESHOLD = 1,
415  OPEN_BST_EGRESS_PORT_SP_THRESHOLD,
416  OPEN_BST_EGRESS_SP_THRESHOLD,
417  OPEN_BST_EGRESS_UC_QUEUE_THRESHOLD,
418  OPEN_BST_EGRESS_UC_QUEUEGROUPS_THRESHOLD,
419  OPEN_BST_EGRESS_MC_QUEUE_THRESHOLD,
420  OPEN_BST_EGRESS_CPU_QUEUE_THRESHOLD,
421  OPEN_BST_EGRESS_RQE_QUEUE_THRESHOLD,
422  OPEN_BST_INGRESS_PORT_PG_THRESHOLD,
423  OPEN_BST_INGRESS_PORT_SP_THRESHOLD,
424  OPEN_BST_INGRESS_SP_THRESHOLD
426 
427 
429 typedef struct _open_bst_error_data_
430 {
431  bool valid;
432  unsigned int rv;
434  int index1;
435  int index2;
437 
438 
441  void *handle, OPEN_BST_TRIGGER_INFO_t *info);
442 
443 /*****************************************************************/
457  int asic,
458  OPEN_ASIC_CAPABILITIES_t *asicCap);
459 
460 /*****************************************************************/
474  int asic,
475  OPEN_BST_CONFIG_t *bstCfg);
476 
477 /*****************************************************************/
491  int asic,
492  OPEN_BST_CONFIG_t *bstCfg);
493 
494 /*****************************************************************/
511  int asic,
515  time_t *time);
516 
517 /*****************************************************************/
534  int asic,
535  open_buffdesc *compSnapshot,
536  time_t *time);
537 
538 /*****************************************************************/
557  int asic,
561 
562 /*****************************************************************/
577  int asic,
579  time_t *time);
580 
581 /*****************************************************************/
596  int asic,
598  time_t *time);
599 
600 /*****************************************************************/
615  int asic,
617  time_t *time);
618 
619 /*****************************************************************/
634  int asic,
636  time_t *time);
637 
638 /*****************************************************************/
653  int asic,
655  time_t *time);
656 
657 /*****************************************************************/
672  int asic,
674  time_t *time);
675 
676 /*****************************************************************/
691  int asic,
693  time_t *time);
694 
695 /*****************************************************************/
710  int asic,
712  time_t *time);
713 
714 /*****************************************************************/
729  int asic,
731  time_t *time);
732 
733 /*****************************************************************/
748  int asic,
750  time_t *time);
751 
752 /*****************************************************************/
767  int asic,
769  time_t *time);
770 
771 /*****************************************************************/
785  int asic,
787 
788 /*****************************************************************/
805  int asic, int port, int pg,
807 
808 /*****************************************************************/
825  int asic, int port, int sp,
827 
828 /*****************************************************************/
844  int asic, int sp,
846 
847 /*****************************************************************/
873  int asic, int port, int sp,
875 
876 /*****************************************************************/
891  int asic, int sp,
893 
894 /*****************************************************************/
918  int asic, int ucQueue,
920 
921 /*****************************************************************/
945  int asic, int ucQueueGrp,
947 
948 /*****************************************************************/
964  int asic, int mcQueue,
966 
967 /*****************************************************************/
983  int asic, int cpuQueue,
985 
986 /*****************************************************************/
1002  int asic, int rqeQueue,
1004 
1005 /*****************************************************************/
1018  int asic);
1019 
1020 /*****************************************************************/
1033  int asic);
1034 
1035 /*****************************************************************/
1052  int asic,
1056  time_t *time);
1057 
1058 /*****************************************************************/
1075  int asic, open_buffdesc *compSnapshot,
1076  time_t *time);
1077 
1078 
1079 /*****************************************************************/
1095  int asic,
1096  int enable,
1097  int pid,
1098  int *clientId);
1099 
1100 /*****************************************************************/
1120  int asic,
1121  int clientId,
1122  OPEN_BST_TRIGGER_CALLBACK_t openCallback,
1123  void *context);
1124 
1125 /*****************************************************************/
1143  int asic,
1144  OPEN_BST_TRIGGER_CALLBACK_t openCallback,
1145  void *context);
1146 
1147 /*****************************************************************/
1161  int asic,
1162  OPEN_ASIC_PORT_MAP_t *data);
1163 
1164 /**********************************************************************/
1180  int asic, int port, int queue,
1181  uint64_t *dropCount);
1182 
1183 
1184 /*****************************************************************/
1200  int asic, int port, int queue,
1201  uint64_t *dropCount);
1202 
1203 /*****************************************************************/
1218  int asic, int port,
1219  uint64_t *dropCount);
1220 
1221 /*****************************************************************/
1234  int asic);
1235 
1236 /*****************************************************************/
1258  int asic, int realmMask,
1259  open_buffdesc *compSnapshot);
1260 
1261 /*****************************************************************/
1275  int asic);
1276 
1277 /*****************************************************************/
1294  int asic, int realmMask,
1295  open_buffdesc *compSnapshot,
1296  OPEN_BST_ERROR_DATA_t *errorData);
1297 
1298 #endif
1299