/* Created by Hdr2H.  Do not edit.*/
#ifndef INSTALL_DDE_ACORNC_C___EXPORT_APCS_32_C_GLOBAL_OSMISC_H
#define INSTALL_DDE_ACORNC_C___EXPORT_APCS_32_C_GLOBAL_OSMISC_H

#ifdef __CC_NORCROFT
#pragma force_top_level
#pragma include_only_once
#endif

#define OSPlatformFeatures_ReadCodeFeatures      (0)
#define OSPlatformFeatures_ReadProcessorVectors  (32)
#define OSPlatformFeatures_ReadCacheInfo         (33)
#define OSPlatformFeatures_ReadCPUFeatures       (34)
#define OSPlatformFeatures_ReadClearExclusive    (35)
#define CPUFlag_SynchroniseCodeAreas             (1 << 0)
#define CPUFlag_InterruptDelay                   (1 << 1)
#define CPUFlag_VectorReadException              (1 << 2)
#define CPUFlag_StorePCplus8                     (1 << 3)
#define CPUFlag_BaseRestored                     (1 << 4)
#define CPUFlag_SplitCache                       (1 << 5)
#define CPUFlag_32bitOS                          (1 << 6)
#define CPUFlag_No26bitMode                      (1 << 7)
#define CPUFlag_LongMul                          (1 << 8)
#define CPUFlag_Thumb                            (1 << 9)
#define CPUFlag_DSP                              (1 << 10)
#define CPUFlag_NoSWP                            (1 << 11)
#define CPUFlag_LoadStoreEx                      (1 << 12)
#define CPUFlag_LoadStoreClearExSizes            (1 << 13)
#define CPUFlag_NoDCacheDisable                  (1 << 14)
#define CPUFlag_ExtendedPages                    (1 << 15)
#define CPUFlag_NoWBDrain                        (1 << 16)
#define CPUFlag_AbortRestartBroken               (1 << 17)
#define CPUFlag_XScale                           (1 << 18)
#define CPUFlag_XScaleJTAGconnected              (1 << 19)
#define CPUFlag_HiProcVecs                       (1 << 20)
#define CPUFlag_HighRAM                          (1 << 21)
#define CPUFlag_NoPhysicalPages                  (1 << 22)
#define CPUFlag_ExtraReasonCodesFixed            (1 << 31)
#define CPUFeature_AESE_AESD_AESMC_AESIMC        (0)
#define CPUFeature_BFC_BFI_SBFX_UBFX             (1)
#define CPUFeature_BKPT                          (2)
#define CPUFeature_BLX                           (3)
#define CPUFeature_BX                            (4)
#define CPUFeature_CLREX_LDREXB_LDREXH_STREXB_STREXH (5)
#define CPUFeature_CLZ                           (6)
#define CPUFeature_CRC32B_CRC32H_CRC32W_CRC32CB_CRC32CH_CRC32CW (7)
#define CPUFeature_DMB_DSB_ISB                   (8)
#define CPUFeature_ERET_MSR_MRS_banked           (9)
#define CPUFeature_HVC                           (10)
#define CPUFeature_Interworking_MOV_pc           (11)
#define CPUFeature_LDAx_STLx                     (12)
#define CPUFeature_LDM_STM_continuable           (13)
#define CPUFeature_LDM_STM_noninterruptible      (14)
#define CPUFeature_LDM_STM_restartable           (15)
#define CPUFeature_LDRD_STRD                     (16)
#define CPUFeature_LDREXD_STREXD                 (17)
#define CPUFeature_LDREX_STREX                   (18)
#define CPUFeature_LDRHT_LDRSBT_LDRSHT_STRHT     (19)
#define CPUFeature_LDRH_LDRSH_STRH               (20)
#define CPUFeature_LDRSB                         (21)
#define CPUFeature_LDR_STR_Rd_Rn_restriction     (22)
#define CPUFeature_MLS                           (23)
#define CPUFeature_MOVW_MOVT                     (24)
#define CPUFeature_MRS_MSR                       (25)
#define CPUFeature_MUL_Rd_Rn_restriction         (26)
#define CPUFeature_MULS_flag_corruption          (27)
#define CPUFeature_NOP_hints                     (28)
#define CPUFeature_PKHxy_xADD16_xADD8_xASX_xSUB16_xSUB8_xSAX_SEL (29)
#define CPUFeature_PLD                           (30)
#define CPUFeature_PLDW                          (31)
#define CPUFeature_PLI                           (32)
#define CPUFeature_PSR_GE_bits                   (33)
#define CPUFeature_PSR_Q_bit                     (34)
#define CPUFeature_QADD_QDADD_QDSUB_QSUB         (35)
#define CPUFeature_RBIT                          (36)
#define CPUFeature_REV_REV16_REVSH               (37)
#define CPUFeature_SEVL                          (38)
#define CPUFeature_SHA1C_SHA1P_SHA1M_SHA1H_SHA1SU0_SHA1SU1 (39)
#define CPUFeature_SHA256H_SHA256H2_SHA256SU0_SHA256SU1 (40)
#define CPUFeature_SMC                           (41)
#define CPUFeature_SMLAxy_SMLALxy_SMLAWy_SMULxy_SMULWy (42)
#define CPUFeature_SMLAlDx_SMLSlDx_SMMLAr_SMMLSr_SMMULr_SMUADx_SMUSDx (43)
#define CPUFeature_SMULL_SMLAL                   (44)
#define CPUFeature_SRS_RFE_CPS                   (45)
#define CPUFeature_SSAT_USAT                     (46)
#define CPUFeature_SWP_SWPB                      (47)
#define CPUFeature_SWP_SWPB_uniproc              (48)
#define CPUFeature_SXTAB_SXTAH_UXTAB_UXTAH       (49)
#define CPUFeature_SXTB16_SXTAB16_UXTB16_UXTAB16 (50)
#define CPUFeature_SXTB_SXTH_UXTB_UXTH           (51)
#define CPUFeature_SYS_mode                      (52)
#define CPUFeature_TEQP                          (53)
#define CPUFeature_UDIV_SDIV                     (54)
#define CPUFeature_UMAAL                         (55)
#define CPUFeature_UMULL_UMLAL                   (56)
#define CPUFeature_WFE                           (57)
#define CPUFeature_Rotated_loads                 (58)
#define CPUFeature_Unaligned_loads               (59)
#define CPUFeature_CP15_IFAR                     (60)
#define CPUFeature_CP15_IFSR                     (61)
#define CPUFeature_CP15_AIFSR                    (62)
#define CPUFeature_CP15_DFAR_DFSR_writable       (63)
#define CPUFeature_CP15_ADFSR                    (64)
#define CPUFeature_Max                           (65)
#define MMUCReason_ModifyControl                 (0)
#define MMUCReason_Flush                         (1)
#define MMUCReason_GetARMop                      (2)
#define MMUCReason_Unknown                       (3)
#define ARMop_Cache_CleanInvalidateAll           (0)
#define ARMop_Cache_CleanAll                     (1)
#define ARMop_Cache_InvalidateAll                (2)
#define ARMop_Cache_RangeThreshold               (3)
#define ARMop_TLB_InvalidateAll                  (4)
#define ARMop_TLB_InvalidateEntry                (5)
#define ARMop_DSB_ReadWrite                      (6)
#define ARMop_IMB_Full                           (7)
#define ARMop_IMB_Range                          (8)
#define ARMop_IMB_List                           (9)
#define ARMop_MMU_Changing                       (10)
#define ARMop_MMU_ChangingEntry                  (11)
#define ARMop_MMU_ChangingUncached               (12)
#define ARMop_MMU_ChangingUncachedEntry          (13)
#define ARMop_MMU_ChangingEntries                (14)
#define ARMop_MMU_ChangingUncachedEntries        (15)
#define ARMop_DSB_Write                          (16)
#define ARMop_DSB_Read                           (17)
#define ARMop_DMB_ReadWrite                      (18)
#define ARMop_DMB_Write                          (19)
#define ARMop_DMB_Read                           (20)
#define ARMop_Cache_CleanInvalidateRange         (21)
#define ARMop_Max                                (22)
#define SeriousErrorV_Collect                    (0)
#define SeriousErrorV_Recover                    (1)
#define SeriousErrorV_Report                     (2)
#define SeriousErrorV_CustomReport               (3)
#define SeriousErrorV_CustomReport_Annotated     (1)
#define ExtROMFooter_BuildDate                   (0)
#define ExtROMFooter_CompressedROMHints          (1)
#define ExtROMFooter_DebugSymbols                (2)
#endif
