%ADR
Summary:      Instruction syntax to load a program-relative or numeric
              address into an ARM address.
 
Syntax:       ADR[<condition>]  Rd,<expression>

%ADRL
Summary:      Instruction syntax to load a program-relative or numeric
              address into an ARM address. It is similar to ADR but will
              always use 2 instructions, so has a larger possible range.
 
Syntax:       ADRL[<condition>]  Rd,<expression>

%AOF
Summary:      Directive to declare that the output image format is AOF.
              See also AOUT.

Syntax:       AOF

%AOUT
Summary:      Directive to declare that the output image format is AOUT.
              See also AOF.

Syntax:       AOUT

%DCD
Summary:      Directive to place data at the current instruction location.
              DCD defines a data area in words, and is equivalent to '&'.
              In ObjAsm, DCD can take a program relative or external
              expression.
 
Syntax:       [<label>]  DCD  <integer expression list>

%EQU
Summary:      Directive to assign a numeric value to a symbol.
              Equivalent to '*'.
 
Syntax:       <label>  EQU  <numeric or program-relative expression>

%DCB
Summary:      Directive to place data at the current instruction location.
              DCB defines a data area in bytes, and is equivalent to '='.
              If given a quoted string as an argument, the characters are
              placed into store.
 
Syntax:       [<label>]  DCB  <list of integer expressions / quoted strings>

%ALIGN
Summary:      Directive to align the current instruction pointer to a
              suitable boundary for following instructions or data. Without
              any arguments, ALIGN aligns to a word boundary, as required
              by ARM instructions or floating point arithmetic data.
 
Syntax:       ALIGN  [<power of two>[, <offset expression>]]

%ASSERT
Summary:      Directive for error trapping, generating an assembly error
              if a logical expression is not true (0).
 
Syntax:       ASSERT  <logical expression>

%CN
Summary:      Directive to assign a coprocessor register number 0-15 to a
              symbol.
 
Syntax:       <label>  CN  <numeric expression>  

%CP
Summary:      Directive to assign a coprocessor number 0-15 to a symbol.
 
Syntax:       <label>  CP  <numeric expression>

%DCFD
Summary:      Directive to place data at the current instruction location.
              DCFD defines a data area in double precision floating point
              constants (occupying two words each).
 
Syntax:       <label>  DCFD  <floating point expression list>

%DCFS
Summary:      Directive to place data at the current instruction location.
              DCFS defines a data area in single precision floating point
              constants (occupying one word each).
 
Syntax:       <label>  DCFS  <floating point expression list>

%DCW
Summary:      Directive to place data at the current instruction location.
              DCW defines a data area in half words (16 bit numbers).
 
Syntax:       [<label>]  DCW  <integer expression list>

%END
Summary:      Directive to mark the end of a source file. Either an END
              or LNK directive must end a source file. When the assembler
              encounters an END directive, processing returns to the
              file up the tree of GET directives, or finishes.
 
Syntax:       END

%FN
Summary:      Directive to define a floating point coprocessor register
              number 0-7 to a symbol.
 
Syntax:       <label>  FN  <integer expression>

%GBLA
Summary:      Directive to define an arithmetic variable.
 
Syntax:       GBLA  <symbol>

%GBLL
Summary:      Directive to define a logical variable.
 
Syntax:       GBLL  <symbol>

%GBLS
Summary:      Directive to define a string variable.
 
Syntax:       GBLS  <symbol>

%GET
Summary:      Directive to include the contents of a further source
              file in the current assembly.
 
Syntax:       GET  <filename>

%BIN
Summary:      Directive to include the contents of a binary file
              verbatim. Use INCBIN in preference to this directive.
 
Syntax:       BIN  <filename>

%INCBIN
Summary:      Directive to include the contents of a binary file
              verbatim.
 
Syntax:       INCBIN  <filename>

%INCLUDE
Summary:      Directive to include the contents of a further source
              file in the current assembly. Synonym for GET.
 
Syntax:       INCLUDE  <filename>

%INFO
Summary:      Directive to check an assembly time assertion and output a
              custom message if the condition is met. If not marked as a 
              warning then the message will be printed out for information
              when the assertion is true.
              Can also be abbreviated to ! instead of INFO.

Syntax:       INFO  <logical expression>,<message>[,<warning>]

%LCLA
Summary:      Directive to define an arithmetic variable local to a
              surrounding macro expansion.
 
Syntax:       LCLA  <symbol>

%LCLL
Summary:      Directive to define a logical variable local to a surrounding
              macro expansion.
 
Syntax:       LCLL  <symbol>

%LCLS
Summary:      Directive to define a string variable local to a
              surrounding macro expansion.
 
Syntax:       LCLS  <symbol>

%LEADR
Summary:      AAsm directive to set the load and execute address of a
              program. Useful for creating relocatable modules with AAsm.
 
Syntax:       LEADR  <numeric expression>

%LNK
Summary:      Directive to include the contents of a further source file
              in the current assembly without returning to the current one.
 
Syntax:       LNK  <filename>

%LTORG
Summary:      Directive to indicate the desired position for literal
              pool data. This is useful to keep pc-relative addressed
              data within reach of referencing instructions.
 
Syntax:       LTORG

%LEAF
Summary:      Directive to set the leaf attribute on the given symbol.
 
Syntax:       LEAF <symbol>

%MACRO
Summary:      Directive marking the start of a macro definition.
 
Syntax:       MACRO

%MEND
Summary:      Directive marking the end of a macro definition.
 
Syntax:       MEND

%MEXIT
Summary:      Directive to force early termination of a macro expansion,
              possibly with unclosed WHILE/WEND loops or conditional
              assembly.
 
Syntax:       MEXIT

%NOFP
Summary:      Directive disabling the recognition of floating point
              instructions - intended as a check for programs known not to
              use floating point.
 
Syntax:       NOFP

%OPT
Summary:      An assembler defined variable containing the current printer
              option. Altering its value changes the print option.
 
Syntax:       OPT  <expression>

%ORG
Summary:      Directive to set the program location counter. Only one
              ORG directive is permitted, and must precede any instructions.
 
Syntax:       ORG  <numeric expression>

%RLIST
Summary:      Directive defining a label for a list of registers.
 
Syntax:       <label>  RLIST  <register list expression>

%RN
Summary:      Directive to assign a register number 0-15 to a symbol.
 
Syntax:       <label>  RN  <numeric expression>

%ROUT
Summary:      Directive to indicate the start of a new local label area.
 
Syntax:       <label>  ROUT

%SETA
Summary:      Directive to set the value of an arithmetic variable.
 
Syntax:       <variable>  SETA  <numeric expression>

%SETL
Summary:      Directive to set the value of a logical variable.
 
Syntax:       <variable>  SETL  <logical expression>

%SETS
Summary:      Directive to set the value of a string variable.
 
Syntax:       <variable>  SETS  <string expression>

%WEND
Summary:      Directive to mark the end of a repetitive assembly block.
 
Syntax:       WEND

%WHILE
Summary:      Directive to mark the start of a repetitive assembly block.
              The following block is assembled while the logical expression
              is true.
 
Syntax:       WHILE  <logical expression>

%AREA
Summary:      ObjAsm directive to set the name and attributes of the area
              containing the code or data following the directive line.
              Possible attributes: ABS, REL, PIC, CODE, DATA, READONLY,
              READWRITE, COMDEF, COMMON, NOINIT, REENTRANT, BASED Rn, 
              ALIGN=expression, INTERWORK, HALFWORD, NOSWSTACKCHECK, VFP, 
              CODEALIGN.
 
Syntax:       AREA  <symbol> [,<list of attributes>]

%CODE32
Summary:      Directive to indicate the following mnemonics are to be 
              interpreted as pre-UAL ARM instructions.

Syntax:       CODE32

%CODE16
Summary:      Directive to indicate the following mnemonics are to be 
              interpreted as pre-UAL Thumb instructions.

Syntax:       CODE16

%ARM
Summary:      Directive to indicate the following mnemonics are to be 
              interpreted as UAL ARM instructions.

Syntax:       ARM

%DATA
Summary:      Directive to declare a label as a data area in the output
              object file.

Syntax        <label>  DATA

%IMPORT
Summary:      ObjAsm directive to define a symbol as an external address
              - one used but not defined within this assembly. When the
              object produced by this assembly is linked, the symbol must
              be defined as one exported by another object linked. If the
              WEAK option is used, Link will not produce an error if this
              symbol is not defined.
 
Syntax:       IMPORT  <symbol> [,WEAK]

%EXPORT
Summary:      ObjAsm directive making the value of a symbol available to
              other objects at link time.
 
Syntax:       EXPORT  <symbol>

%FILL
Summary:      Reserves space in the store and fills it with the given value
              and width. If value is not given zero is used, so behaving
              like the SPACEdirective. If width is not given 1 is used,
              so the value is taken to be byte sized.
 
Syntax:       FILL  <amount>[,<value>[,<width>]]

%SPACE
Summary:      Reserves space in the store and fills it with zero.
 
Syntax:       SPACE  <amount>

%STRONG
Summary:      ObjAsm directive making the value of a symbol available to
              other objects at link time, with the Strong attribute set.
 
Syntax:       STRONG  <symbol>

%TTL
Summary:      Sets the title for the source when used in conjunction with
              OPT, which will be used until the next TTL is encountered.

Syntax:       TTL  <title text>

%SUBT
Summary:      Sets the subtitle for the source when used in conjunction with
              OPT, which will be used until the next SUBT is encountered.

Syntax:       SUBT  <subtitle text>

%ENTRY
Summary:      ObjAsm directive causing the program's execution to start
              from the position of the directive. Only one ENTRY directive
              can be used in a set of source files for a program.
 
Syntax:       ENTRY

%KEEP
Summary:      ObjAsm directive keeping symbols local to the current assembly
              in the symbol list of the object file produced. KEEP with no
              symbol list keeps all local symbols defined. Symbol values
              kept are available for reference by DDT, making machine level
              debugging more productive.
 
Syntax:       KEEP  [<symbol list>]

%UND
Summary:      Undefined instruction. Using this directive will emit an 
              instruction which is defined by ARM to be undefined. The 
              immediate value, if given, is 16 bit.
 
Syntax:       UND[<cond>]  [#<integer expression>]

%LDF
Summary:      Floating point instruction to load fp. register from memory.
 
Syntax:       LDF[<cond>][<precision>]  Fd, <address>

%STF
Summary:      Floating point instruction to save fp. register to memory.
 
Syntax:       STF[<cond>][<precision>]  Fd, <address>

%LFM
Summary:      Floating point instruction to load a set of fp. registers
              from memory.
 
Syntax:       LFM[<cond>][<stacktype>]  Fd, <count>, <address>[!]

%SFM
Summary:      Floating point instruction to save a set of fp. registers
              to memory.
 
Syntax:       SFM[<cond>][<stacktype>]  Fd, <count>, <address>[!]

%FLT
Summary:      Floating point instruction:
              Integer to Floating Point:    Fn := Rd
 
Syntax:       FLT[<condition>]<precision>[<roundmode>] Fn,Rd

%FIX
Summary:      Floating point instruction:
              Floating point to integer:    Rd := Fm
 
Syntax:       FIX[<condition>]<precision>[<roundmode>] Rd,Fn

%WFS
Summary:      Floating point instruction:
              Write Floating Point Status:  FPSR := Rd
 
Syntax:       WFS[<condition>]  Rd

%RFS
Summary:      Floating point instruction:
              Read Floating Point Status:   Rd := FPSR
 
Syntax:       RFS[<condition>]  Rd

%WFC
Summary:      Floating point instruction:
              Write Floating Point Control: FPC := Rd     Supervisor Only
 
Syntax:       WFC[<condition>]  Rd

%RFC
Summary:      Floating point instruction:
              Read Floating Point Control:  Rd := FPC     Supervisor Only
 
Syntax:       RFC[<condition>]  Rd

%ADF
Summary:      Floating point instruction:
              Add:                        Fd := Fn + Fm
 
Syntax:       ADF[<condition>]<precision>[<roundmode>]  Fd, Fn, Fm

%MUF
Summary:      Floating point instruction:
              Multiply:                   Fd := Fn * Fm
 
Syntax:       MUF[<condition>]<precision>[<roundmode>]  Fd, Fn, Fm

%SUF
Summary:      Floating point instruction:
              Sub:                        Fd := Fn - Fm
 
Syntax:       SUF[<condition>]<precision>[<roundmode>]  Fd, Fn, Fm

%RSF
Summary:      Floating point instruction:
              Reverse Subtract:           Fd := Fm - Fn
 
Syntax:       RSF[<condition>]<precision>[<roundmode>]  Fd, Fn, Fm

%DVF
Summary:      Floating point instruction:
              Divide:                     Fd := Fn / Fm
 
Syntax:       DVF[<condition>]<precision>[<roundmode>]  Fd, Fn, Fm

%RDF
Summary:      Floating point instruction:
              Reverse Divide:             Fd := Fm / Fn
 
Syntax:       RDF[<condition>]<precision>[<roundmode>]  Fd, Fn, Fm

%POW
Summary:      Floating point instruction:
              Power:                      Fd := Fn raised to the power of Fm
 
Syntax:       POW[<condition>]<precision>[<roundmode>]  Fd, Fn, Fm

%RPW
Summary:      Floating point instruction:
              Reverse Power:              Fd := Fm raised to the power of Fn
 
Syntax:       RPW[<condition>]<precision>[<roundmode>]  Fd, Fn, Fm

%RMF
Summary:      Floating point instruction:
              Remainder:                  Fd := IEEE remainder of Fn / Fm
 
Syntax:       RMF[<condition>]<precision>[<roundmode>]  Fd, Fn, Fm

%FML
Summary:      Floating point instruction:
              Fast Multiply:              Fd := Fn * Fm
 
Syntax:       FML[<condition>]<precision>[<roundmode>]  Fd, Fn, Fm

%FDV
Summary:      Floating point instruction:
              Fast Divide:                Fd := Fn / Fm
 
Syntax:       FDV[<condition>]<precision>[<roundmode>]  Fd, Fn, Fm

%FRD
Summary:      Floating point instruction:
              Fast Reverse Divide:        Fd := Fm / Fn
 
Syntax:       FRD[<condition>]<precision>[<roundmode>]  Fd, Fn, Fm

%POL
Summary:      Floating point instruction:
              Polar angle (ArcTan2):      Fd := polar angle of (Fn, Fm)
 
Syntax:       POL[<condition>]<precision>[<roundmode>]  Fd, Fn, Fm

%MVF
Summary:      Floating point instruction:
              Move:                       Fd := Fm
 
Syntax:       MVF[<condition>]<precision>[<roundmode>]  Fd, Fm

%MNF
Summary:      Floating point instruction:
              Move Negated:               Fd := - Fm
 
Syntax:       MNF[<condition>]<precision>[<roundmode>]  Fd, Fm

%ABS
Summary:      Floating point instruction:
              Absolute value:             Fd := ABS ( Fm )
 
Syntax:       ABS[<condition>]<precision>[<roundmode>]  Fd, Fm

%RND
Summary:      Floating point instruction:
              Round to integral value:    Fd := integer value of Fm
 
Syntax:       RND[<condition>]<precision>[<roundmode>]  Fd, Fm

%SQT
Summary:      Floating point instruction:
              Square root:                Fd := square root of Fm
 
Syntax:       SQT[<condition>]<precision>[<roundmode>]  Fd, Fm

%LOG
Summary:      Floating point instruction:
              Logarithm to base 10:       Fd := logten of Fm 
 
Syntax:       LOG[<condition>]<precision>[<roundmode>]  Fd, Fm

%LGN
Summary:      Floating point instruction:
              Logarithm to base e:        Fd := loge of Fm
 
Syntax:       LGN[<condition>]<precision>[<roundmode>]  Fd, Fm

%EXP
Summary:      Floating point instruction:
              Exponent:                   Fd := e ** Fm
 
Syntax:       EXP[<condition>]<precision>[<roundmode>]  Fd, Fm

%SIN
Summary:      Floating point instruction:
              Sine:                       Fd := sine of Fm
 
Syntax:       SIN[<condition>]<precision>[<roundmode>]  Fd, Fm

%COS
Summary:      Floating point instruction:
              Cosine:                     Fd := cosine of Fm
 
Syntax:       COS[<condition>]<precision>[<roundmode>]  Fd, Fm

%TAN
Summary:      Floating point instruction:
              Tangent:                    Fd := tangent of Fm
 
Syntax:       TAN[<condition>]<precision>[<roundmode>]  Fd, Fm

%ASN
Summary:      Floating point instruction:
              Arc Sine:                   Fd := arcsine of Fm
 
Syntax:       ASN[<condition>]<precision>[<roundmode>]  Fd, Fm

%ACS
Summary:      Floating point instruction:
              Arc Cosine:                 Fd := arccosine of Fm
 
Syntax:       ACS[<condition>]<precision>[<roundmode>]  Fd, Fm

%ATN
Summary:      Floating point instruction:
              Arc Tangent:                Fd := arctangent of Fm
 
Syntax:       ATN[<condition>]<precision>[<roundmode>]  Fd, Fm

%CMF
Summary:      Floating point instruction:
              Compare floating:           compare Fn with Fm
 
Syntax:       CMF[<condition>]  Fd, Fm

%CNF
Summary:      Floating point instruction:
              Compare negated floating:   compare Fn with -Fm
 
Syntax:       CNF[<condition>]  Fd, Fm

%CMFE
Summary:      Floating point instruction:
              Compare floating with exception:  compare Fn with Fm
 
Syntax:       CMFE[<condition>]  Fd, Fm

%CNFE
Summary:      Floating point instruction:
              Compare negated floating with exception: compare Fn with -Fm
 
Syntax:       CNFE[<condition>]  Fd, Fm
               
%LDR
Summary:      ARM assembler instruction:
              Load single ARM register from memory.
 
Syntax:       LDR[<condition>][B][H][SB][SH][T]  Rd, <address>

%STR
Summary:      ARM assembler instruction:
              Save single ARM register to memory.
 
Syntax:       STR[<condition>][B][H][T]  Rd, <address>

%LDM
Summary:      ARM assembler instruction:
              Load a set of ARM registers from memory.
 
Syntax:       LDM[<condition>](FD|ED|FA|EA|IA|IB|DA|DB) Rn[!], <register list>[^]

%STM
Summary:      ARM assembler instruction:
              Save a set of ARM registers to memory.
 
Syntax:       STM[<condition>](FD|ED|FA|EA|IA|IB|DA|DB) Rn[!], <register list>[^]

%B
Summary:      ARM assembler instruction:
              Branch execution.
 
Syntax:       B[<condition>]  <address expression>

%BX
Summary:      ARM assembler instruction:
              Branch execution with optional exchange to Thumb mode.
 
Syntax:       BX[<condition>]  <Rm>

%BL
Summary:      ARM assembler instruction:
              Branch execution and link (place previous pc(r15) in lr(r14)).
 
Syntax:       BL[<condition>]  <address expression>

%BKPT
Summary:      ARM assembler instruction:
              Debugger breakpoint.
 
Syntax:       BKPT  <integer expression>

%BLX
Summary:      ARM assembler instruction:
              Branch execution and link (place previous pc(r15) in lr(r14)) with optional exchange to Thumb mode.
 
Syntax:       BLX  <address expression>
              BLX[<condition>]  <Rm>

%ADC
Summary:      ARM assembler instruction:
              Add Rn and operand 2 plus carry (PSR C flag).
 
Syntax:       ADC[<condition>][S]  Rd, Rn, Op2

%ADD
Summary:      ARM assembler instruction:
              Add Rn and operand 2.
 
Syntax:       ADD[<condition>][S]  Rd, Rn, Op2

%AND
Summary:      ARM assembler instruction:
              Bit-wise logical AND of Rn and operand 2.
 
Syntax:       AND[<condition>][S]  Rd, Rn, Op2

%BIC
Summary:      ARM assembler instruction:
              Bit clear (bit-wise logical AND of Rn and NOT
              operand 2).
 
Syntax:       BIC[<condition>][S]  Rd, Rn, Op2

%CMN
Summary:      ARM assembler instruction:
              Add Rn and operand 2, but result is not written.
 
Syntax:       CMN[<condition>][P]  Rn, Op2

%CMP
Summary:      ARM assembler instruction:
              Subtract Rn and operand 2, but result is not written.
 
Syntax:       CMP[<condition>][P]  Rn, Op2

%CLZ
Summary:      ARM assembler instruction:
              Count leading zeros.
 
Syntax:       CLZ[<condition>]  Rd, Rm

%EOR
Summary:      ARM assembler instruction:
              Bit-wise logical EOR of Rn and operand 2.
 
Syntax:       EOR[<condition>][S]  Rd, Rn, Op2

%MOV
Summary:      ARM assembler instruction:
              Move operand 2 to destination register.
 
Syntax:       MOV[<condition>][S]  Rd, Op2

%MRS
Summary:      ARM assembler instruction:
              Move PSR to destination register.
 
Syntax:       MRS[<condition>]  Rd, [C|S]PSR

%MSR
Summary:      ARM assembler instruction:
              Move register to PSR.
 
Syntax:       MSR[<condition>]  [C|S]PSR_[cxsf], Rm
              MSR[<condition>]  [C|S]PSR_[cxsf], #<integer expression>

%MVN
Summary:      ARM assembler instruction:
              Move logical NOT operand 2 to destination register.
 
Syntax:       MVN[<condition>][S]  Rd, Op2

%MUL
Summary:      ARM assembler instruction:
              Multiply two registers with a 32 bit result.
 
Syntax:       MUL[<condition>][S]  Rd, Rm, Rs

%MLA
Summary:      ARM assembler instruction:
              Multiply two registers with a 32 bit result, and accumulate with Rn.
 
Syntax:       MLA[<condition>][S]  Rd, Rm, Rs, Rn

%ORR
Summary:      ARM assembler instruction:
              Bit-wise logical OR of Rn and operand 2.
 
Syntax:       ORR[<condition>][S]  Rd, Rn, Op2

%RSB
Summary:      ARM assembler instruction:
              Subtract Rn from operand 2.
 
Syntax:       RSB[<condition>][S]  Rd, Rn, Op2

%RSC
Summary:      ARM assembler instruction:
              Subtract Rn from operand 2 plus carry.
 
Syntax:       RSC[<condition>][S]  Rd, Rn, Op2

%SBC
Summary:      ARM assembler instruction:
              Subtract operand 2 from Rn plus carry.
 
Syntax:       SBC[<condition>][S]  Rd, Rn, Op2

%SUB
Summary:      ARM assembler instruction:
              Subtract operand 2 from Rn.
 
Syntax:       SUB[<condition>][S]  Rd, Rn, Op2

%TEQ
Summary:      ARM assembler instruction:
              Bit-wise logical EOR of Rn and operand 2, but result
              is not written.
 
Syntax:       TEQ[<condition>][P]  Rn, Op2

%TST
Summary:      ARM assembler instruction:
              Bit-wise logical AND of Rn and operand 2, but result
              is not written.
 
Syntax:       TST[<condition>][P]  Rn, Op2


%SWI
Summary:      ARM assembler instruction:
              Software interrupt. This is the normal instruction for
              calling RISC OS operating system facilities. Registers
              are set to contain input data before calling particular
              SWI numbers.
 
Syntax:       SWI[<condition>]  <integer expression>

%SWP
Summary:      ARM assembler instruction for ARM3 or later processors:
              Swap a byte or word quantity between a register and memory
              without any interrupt between the read and write. SWPB
              swaps the bottom 8 bits of a register, clearing the others.
              Rd := Rp=>, Rp=> := Rs.
 
Syntax:       SWP[<condition>][B]  Rd, Rs, "["Rp"]"

%SMULL
Summary:      ARM assembler instruction:
              Multiply two registers with a signed 64 bit result.
 
Syntax:       SMULL[<condition>][S]  RdLo, RdHi, Rm, Rs

%SMLAL
Summary:      ARM assembler instruction:
              Multiply two registers with a signed 64 bit result, and accumulate with Rd.
 
Syntax:       SMLAL[<condition>][S]  RdLo, RdHi, Rm, Rs

%UMULL
Summary:      ARM assembler instruction:
              Multiply two registers with an unsigned 64 bit result.
 
Syntax:       UMULL[<condition>][S]  RdLo, RdHi, Rm, Rs

%UMLAL
Summary:      ARM assembler instruction:
              Multiply two registers with an unsigned 64 bit result, and accumulate with Rd.
 
Syntax:       UMLAL[<condition>][S]  RdLo, RdHi, Rm, Rs
