




ACEPlus Design Entry System
===========================

Thank you for your interest in the ACEPlus Design Entry System from
Intergraph Electronics.  This "readme.txt" file briefly introduces ACEPlus,
notes specific details about this demonstration copy, and discusses the
examples supplied as part of the demonstration.  You may  wish to print a copy
of this file for easy reference.  


About ACEPlus
=============
A key requirement in any design process is the ability to quickly and easily
capture design concepts.  The graphical capture solution of choice for every
design engineer's desktop is ACEPlus, an extremely versatile tool that allows
designs to be represented as a mixture of hierarchical schematics, state
diagrams, and hardware description languages such as Verilog HDL and VHDL.
ACEPlus supports analog, digital, and mixed-signal (analog and digital)
designs.  ACEPlus also supports any combination of top-down, middle-out, and 
bottom-up hierarchical design methodologies permitting the capture process to
commence at any level of abstraction.  Additional notes about ACEPlus and this
demonstration are provided below.  For more information, please contact
Intergraph Electronics at 1-800-VERIBEST (1-800-837-4237).


Intuitive and Easy To Use
=========================
ACEPlus has an intuitive user-friendly interface that significantly reduces 
any user's learning curve.  Both object-action and action-object paradigms 
are supported, and designs can be entered using any combination of command 
styles, including pull-down, pop-up, or iconic menus, as well as direct 
keyboard and function key entry.  ACEPlus is also equipped with sophisticated 
context-sensitive online help facilities allowing users to quickly resolve 
questions, and rapidly locate and understand rarely used commands.  For 
context-sensitive online help, simply select a command and press the <F1> 
function key. 


Flexible and Configurable
=========================
In addition to supporting the concurrent development of ICs, PLDs, FPGAs,
ASICs, hybrids, MCMs, and PCBs, ACEPlus serves as a front-end to all of
Intergraph's analog, digital, mixed-signal, and mixed-discipline verification
and layout tools as well as many third-party applications.  ACEPlus can also
input and output data in a variety of standard formats making it an ideal 
standalone design capture station.

ACEPlus is highly configurable and can be easily customized to suit in-house
standards or individual user preferences.  Every graphical object supports
user-defined symbology for attributes such as line styles, colors, and widths.
User-selectable text fonts, colors, and sizes are also supported.  Online 
modification of attributes can be performed on an individual, group, or 
global basis.

Further customization may be achieved by the use of programmable function keys
and the creation of user defined macro files. The user also has the ability to 
modify existing command names and to add new commands to the pull-down, 
pop-up, and iconic menus.  The iconic menu itself can be located to the left 
or right of the working area, or it can be completely disabled if desired.  


Multi-Platform Support
======================
ACEPlus is available for UNIX, DOS/Windows, and Windows NT operating systems.
All files generated by ACEPlus are binary compatible across platforms and 
operating systems.  For example, ACEPlus schematics and state diagrams 
generated on a PC running Windows NT can be transfered to a workstation 
running UNIX and directly accessed by ACEPlus on that workstation.

One of the major advantages offered by Windows and Windows NT is automatic
access to a vast array of applications.  For example, ACEPlus schematics can
be cut and pasted directly into tools such as MicroSoft Word or PaintBrush
for documentation purposes.


Integrated Symbol Editor
========================
Intergraph provides an extensive set of graphic symbol libraries for the most
commonly used electronic components in commercial, military, IEEE, and IEC 
standards.  Custom or new ACEPlus component symbols can be quickly created 
on-the-fly using the built-in symbol editor.

Moreover, ACEPlus schematic and library databases can be converted into a
simple ASCII textual format, modified, and then read back into the binary
database.  This bidirectional binary-to-ASCII conversion capability allows
users to manipulate large quantities of schematic and library data in a highly
efficient manner.  This capability also allows component symbols to be quickly
constructed via textual entry or automatic techniques.  As yet another aid to
productivity, users can interactively view symbols before placing them by
means of a unique built-in library browser.


Robust Functionality
====================
ACEPlus has all the facilities necessary to satisfy the most complex design
requirements and the most demanding designers.  Its multi-view, multi-file
editing environment offers exceptionally fast graphics that maximize
productivity and minimize user frustration.  Sophisticated editing facilities
include selecting objects based on user-defined criteria and Boolean
conditions, rotating a collection of selected objects individually or as a
group, manipulating symbols and nets as arrays, and dynamic Pan and Zoom to
name but a few.  When hard-copy is required, ACEPlus provides powerful 
what-you-see-is-what-you-get (WYSIWYG) online plotting capabilities.

The ACEPlus environment also comes equipped with a wealth of support
facilities such as user-selectable online rules verification, user-formatable
cross-page reference generation and annotation, and user-formatable
build-of-materials (BOM) generation.  To support the tight integration of
third party applications, Intergraph can also supply a procedural interface
product, ACEPlus PI, which offers bidirectional read and write capabilities
into the ACEPlus database.

When used in conjunction with Intergraph's layout applications, objects
selected in ACEPlus are automatically selected in layout and vica versa.
ACEPlus supports both forward-annotation to, and back-annotation from, the
layout world.  For example, the designer can attach user-defined attributes
such as width, maximum length, and maximum delay to nets in ACEPlus, and
these attributes can be detected and used by the layout applications. 


About this Demonstration Copy
=============================
This demonstration copy of ACEPlus is provided with examples which are
discussed in more detail below.  The demonstration can be invoked directly
from the CD or installed onto your local disk and then invoked (see below).  
Additionally, the demonstration is supplied with a basic symbol library of 
logic gates and connectors allowing you to create your own schematics and 
experiment with ACEPlus.  You can save these schematics to your local disk 
and recall them for later use.  However, certain functionality has been 
disabled in this demonstration copy; specifically, the ability to generate 
netlists or plot schematics.


About Intergraph
================
Intergraph Corporation, a fortune 500 company, is a leading supplier of CAE,
CAD, and CAM systems.  Intergraph has an enviable 25-year record of 
satisfying the needs of technical customers.  With 1992 revenues in excess
of $1.2 billion, a worldwide sales and service network and offices around
the globe, Intergraph is destined to provide the EDA marketplace with
continued leadership and long-term stability. 

For CAE applications, Intergraph is proud to offer an outstanding suite of
tools which embrace all aspects of design, including Management, Capture,
Synthesis, and Simulation.


How To Run ACEPlus
==================
ACEPlus can be invoked directly from the demonstration CD or it can be 
installed on your local disk and then invoked.  If run from the demo CD, 
ACEPlus will run in Read Only mode.  This means that you will be able to view
the existing demo files, but you will not be able to create your own 
schematics.  If ACEPlus is installed on your disk, it will run in full 
Read/Write mode and will allow you to create your own schematics.

To invoke ACEPlus directly from the CD, simply double click with the left 
mouse button on the "aceplus.exe" file from within the File Manager.

To invoke ACEPlus once it has been installed on your local drive, double
click on the ACEPLUS 12.0 icon which appears in the Program Manager.

After ACEPlus loads, the Root Window is displayed.  From this window new 
symbols and schematics can be created or existing symbols and schematics 
can be edited.  ACEPlus commands can be executed from icons, pull-down
menus, direct keyins, and context sensitive pop-up menus.  

Across the top of the screen the pull-down menu bar can be seen.  From here 
all available commands can be executed.

To enter into the demonstration design, select the "File, Open..." command
from the pull-down menu bar.  A menu will appear displaying all available
schematics.  Select the "TOP.EXE" entry in this list and then select "OK".

On the left side of the screen there is an icon menu from which commands can
also be selected.  The commands displayed in the icon menu are the most 
frequently used commands and are placed here for easy access.

Across the bottom of the screen is the keyin message field.  When commands
are entered, the two letter keyin representing that command is displayed 
here.

There are also context sensitive pop-up menus.  For systems with a three 
button mouse, these menus appear by pressing and holding the middle mouse 
button.  For a two button mouse, press and hold the <Alt> key with either
of the two mouse buttons.  The context sensitive pop-up menus contain 
additional commands which allow you to modify the command you are in when 
invoked.

Commands can be selected with the mouse or by direct keyins.  To select a 
command with the mouse, simply place the mouse cursor over the icon or menu
selection desired and click the left mouse button once.  For direct keyins
to be used, you must know the two letter keyin for each command.  The two
letter keyins can be learned from the pull-down menus.  On the pull-down
menus, two letters of each command are underlined.  This is the keyin for
command.  For example, to create a new schematic the pull-down command is:

          File New...
          -    -

with the F in File and the N in New underlined.  The keyin for this command 
is "FN" (or "fn" since keyins are not case sensitive).  Anytime a command is
executed, regardless of which method is used, the two letter keyin for that
command appears in the keyin field at the bottom of the screen and the
associated icon in the icon menu bar is highlighted.


About the Demonstration Circuit
===============================
The circuit used in this demonstration CD is a top-down hierarchical design 
describing a simple candy machine.  For simplicity, the design was created 
using the following guidelines:

    - The candy machine only takes nickels and dimes.

    - Candy bars cost 15 cents.

    - The possible selections are Snickers, Mars, Mounds, and Hersheys.

The top-level schematic is called "TOP.SBK" and contains three hierarchical 
blocks.  One block contains a gate-level schematic diagram, another a 
graphical state diagram, and the third a textual Verilog HDL description.  

In order to see the contents of a block, you must first select the desired 
block with a single click of the left mouse button.  Notice that the block is 
now highlighted.  Now select the "Block, Push" command from the pull-down 
menu bar at the top of the screen.  Once in a block, you may exit it by 
selecting the "Block, Pop" command from the pull-down menu bar or you may 
close it by selecting the "Close" icon from the icon menu bar.

The MONEY block is a state machine described using the State Diagram Editor
in ACEPlus.  It monitors the NICKEL_IN and DIME_IN inputs and generates a 
DISPENSE signal when 15 cents has been accumulated.  It also generates a
NICKEL_OUT signal if you insert more than 15 cents.  After a candy bar 
selection has been made, a SEL_MADE signal resets the state machine back to
its initial state (CLEAR).  An asynchronous reset signal (RST), which also
sends the state machine into its CLEAR state, is used to initialize the state
machine.  The state machine is synchronized with the rising edge of the CLK
signal.

The SELECT block is a gate-level schematic created using the Schematic Editor
in ACEPlus.  The symbols used in the schematic come from the BASIC library
delivered with ACEPlus.  This block is enabled only when the MONEY block
generates a DISPENSE signal.  Other inputs to this block include the signals
for selecting one of the four different types of candy bars.  Outputs include
a signal representing the selected candy bar and a signal (SEL_MADE) which 
indicates that a selection has been made.  The SEL_MADE signal is used to 
reset the state machine in the MONEY block to its CLEAR state.

The STIMULUS block is a Verilog model created with the NT Notepad editor 
invoked through ACEPlus.  This block contains the stimulus used to exercise
the functionality of the design.

Feel free to explore ACEPlus on your own.  Remember, that the context 
sensitive help can be used at any time to aid in your exploration.  Simply
select the command that you are curious about and then press the <F1> 
function key.
