1 INFO-VAX	Wed, 02 Mar 2005	Volume 2005 : Issue 122       Contents:. %TCPIP-F-SSH_FATAL error from TCPIP$CONFIG.COM Re: Backup /ALIAS question Re: Batch Queue  Re: Batch Queue ) Re: Can't copy files using SCP on OpenVMS # Re: Changing Tape Device protection & Re: DECC : toupper/tolower performance& Re: DECC : toupper/tolower performance& Re: DECC : toupper/tolower performance& Re: DECC : toupper/tolower performance& Re: DECC : toupper/tolower performance& Re: DECC : toupper/tolower performance& Re: DECC : toupper/tolower performance& Re: DECC : toupper/tolower performance& Re: DECC : toupper/tolower performance& Re: DECC : toupper/tolower performance# Re: Fiorina and The Peter Principle # Re: Fiorina and The Peter Principle  Re: GBLSECTIONS loop* Re: Has anyone had any bad T4 experiences?* RE: Has anyone had any bad T4 experiences?* Re: Has anyone had any bad T4 experiences?( Re: Has the shine come off of Microsoft?( Re: Has the shine come off of Microsoft?9 How to reset environment at the beginning of each request J RE: Interesting error message I just got trying to access accuwea	ther.comJ RE: Interesting error message I just got trying to access accuwea	ther.comJ RE: Interesting error message I just got trying to access accuwea	ther.com Media  7.3.2 Re: Media  7.3.2 Re: Media  7.3.2  Re: mime encode message in batch& Re: new Itanium after Tukwila: Poulson& Re: new Itanium after Tukwila: Poulson& Re: new Itanium after Tukwila: Poulson& Re: new Itanium after Tukwila: Poulson& Re: new Itanium after Tukwila: Poulson& Re: new Itanium after Tukwila: Poulson& Re: new Itanium after Tukwila: Poulson& Re: new Itanium after Tukwila: Poulson& Re: new Itanium after Tukwila: Poulson8 Re: OpenVMS Seminar in Toronto (2005-02-24) a few points8 Re: OpenVMS Seminar in Toronto (2005-02-24) a few points8 Re: OpenVMS Seminar in Toronto (2005-02-24) a few points8 Re: OpenVMS Seminar in Toronto (2005-02-24) a few points8 Re: OpenVMS Seminar in Toronto (2005-02-24) a few points Re: Ouch! a *MAJOR* bug in TPU.  Re: Ouch! a *MAJOR* bug in TPU.  Re: Point Secure& Re: Problem with a DEC terminal server sysgen and decw problem  Re: sysgen and decw problem  Re: sysgen and decw problem  Re: vms mail forwarding  Re: vms mail forwarding  Re: VMS mail nla0: as mailbox ? < Re: What is the Difference between Shadow and Mirrored disk?< Re: What is the Difference between Shadow and Mirrored disk?$ Re: What text format and VMS tools ?4 Re: [OT]: Microsoft tries to patent a BASIC operator4 Re: [OT]: Microsoft tries to patent a BASIC operator4 Re: [OT]: Microsoft tries to patent a BASIC operator  F ----------------------------------------------------------------------   Date: 2 Mar 2005 06:07:25 -0800 & From: "Galen" <gspamtackett@yahoo.com>7 Subject: %TCPIP-F-SSH_FATAL error from TCPIP$CONFIG.COM C Message-ID: <1109772445.545839.173760@l41g2000cwc.googlegroups.com>   D Yesterday I downloaded the SSH EAK to install on a VMS V7.3-1 systemC with TCP/IP Services V5.3 ECO 3. (We can't readily upgrade to newer 9 versions or ECOs due to configuration management issues.)   B I was able to get SSH working on two of three similarly configuredC systems without much trouble. On the third, however, I get an error E when I try to enable and start the SSH server using TCPIP$CONFIG.COM. F When the script attempts to generate new keys by invoking SSH_KEYGEN2, it gives this error message:  6 %TCPIP-F-SSH_FATAL, non-specific fatal error condition  D How helpful that is! There's no other text to indicate what might be	 going on.   F Using Google I've found other references to TCPIP-F-SSH_FATAL but none+ that offered any insight into this problem.   % Any help will be greatly appreciated.   @ (I already took care of the issue with /FLAG=TCPIP needing to be= removed from the SET SERVICE SSH command in TCPIP$CONFIG.COM)    ------------------------------   Date: 2 Mar 2005 07:31:37 -0600 ; From: koehler@eisner.nospam.encompasserve.org (Bob Koehler) # Subject: Re: Backup /ALIAS question 3 Message-ID: <8V9mNDG6Kt5b@eisner.encompasserve.org>   ` In article <422516E3.7B201985@comcast.net>, David J Dachtera <djesys.nospam@comcast.net> writes: > < > However, UN*X-like "links" ("aliases") are new with ODS-5. >   B    Yes, but I got the impression that the OP was talking about old    fashioned file aliases.   ------------------------------    Date: 02 Mar 2005 16:25:14 +0100( From: Andreas Davour <ante@update.uu.se> Subject: Re: Batch Queue4 Message-ID: <cs9vf8a3w9x.fsf@Psilocybe.Update.UU.SE>  - "Doc." <doc.cypher@openvms-rocks.com> writes:   J > %NEWS-I-NEWMSG, Stephen  Costigan wrote in news:1109023377.615702.126410 > @l41g2000cwc.googlegroups.com  > G > > Wow this system sounds great I wish I had known about it before....  > M > I'm not about to give you administrative privileges, but you're welcome to  K > open an account on the Deathrow Cluster (see sig) and play.  You'll find  K > we've a number of queues for mail and batch jobs and can see some of the  H > structures people can define first-hand.  You can also read the Notes I > conference where we've a number of people who've learned the basics of  C > system administration from questions asked there.  For seriously  3 > comprehensive Notes conferences, look for EISNER.   % So, where do I find this node EISNER?    /andreas   --  A A: Because it fouls the order in which people normally read text. ' Q: Why is top-posting such a bad thing?  A: Top-posting. ; Q: What is the most annoying thing on usenet and in e-mail?    ------------------------------  % Date: Wed, 02 Mar 2005 10:37:03 -0500 6 From: Brad Hamilton <brMadAhaPmiSlton@coMmcAasPt.Snet> Subject: Re: Batch Queue0 Message-ID: <gpudnboXHts8QLjfRVn-gg@comcast.com>   Andreas Davour wrote:  >><snip>  For seriously 3 >>comprehensive Notes conferences, look for EISNER.  >  > ' > So, where do I find this node EISNER?  > 
 > /andreas >   D Telnet or SSH to eisner.decuserve.org, and login with the user name H "REGISTRATION".  This will take you through a registration process, and 4 you will be issued a username for use on the system.  F NOTES on EISNER:: contains VMS-related conferences stretching back to E 1981.  You may find answers to some of your questions there (use the  L "SEARCH" feature within NOTES to browse conferences for topics of interest).   ------------------------------   Date: 2 Mar 2005 07:36:55 -0600 ; From: koehler@eisner.nospam.encompasserve.org (Bob Koehler) 2 Subject: Re: Can't copy files using SCP on OpenVMS3 Message-ID: <QSdCBUg0djsb@eisner.encompasserve.org>   ^ In article <1109726686.466907.148630@o13g2000cwo.googlegroups.com>, bill@wcschmidt.com writes:I > I'm not sure if this will help, I was having an issue transfering files  > using SFTPE > and after beating my head against the wall for a while, I read some A > where that SFTP can only transfer files with a record format of G > STREAM_LF, so I created a FDL then  ran convert/fdl against the file,  > not it transfers    D    A good SFTP like Multinet's solves the problem, provided you have)    an equally good SFTP at the other end.   D    Originally SFTP did all files as binary.  Most vendors have since    added text mode.    ------------------------------  $ Date: Wed, 2 Mar 2005 08:35:06 -0500* From: "Marty O'Connor" <moconnor@dvfs.com>, Subject: Re: Changing Tape Device protection, Message-ID: <38ltn8F5ps2cnU1@individual.net>  A "David J Dachtera" <djesys.nospam@comcast.net> wrote in message :   E : Now, if only there was a way to make FC tape DEVICES persist across E : boots! If something changes in the (T)SAN, I get a whole new set of % : devices and my old ones go bye-bye!  : G : Not sure what evil magic is at work there, but sure blew my doors off  : when I saw THAT one! : G : Anyway, no big deal with the DCL approach, and I don't have to update " : anything if I add a tape device. :   b Have you looked into SYSMAN IO REPLACE $2$MGAx:? Once I got everything set the way I wanted it has9 been very stabel except when a physical drive is swapped.  Marty    ------------------------------  $ Date: Wed, 2 Mar 2005 08:48:13 +0100( From: "Rudolf Wingert" <win@fom.fgan.de>/ Subject: Re: DECC : toupper/tolower performance 3 Message-ID: <001401c51efc$2fe9cad0$994614ac@wat153>    Hello,  D I think the fastes way is to use table lookup. Under OpenVMS VAX youC will have a MACRO instruction (TRANS???). Under OpenVMS AXP I don't  know.    Best regards R. Wingert    ------------------------------   Date: 2 Mar 2005 01:12:44 -0800  From: martinkirby12@yahoo.co.uk / Subject: Re: DECC : toupper/tolower performance C Message-ID: <1109754764.821036.210030@z14g2000cwz.googlegroups.com>    Z wrote: > JF Mezei wrote: G > > I need to do a case insensitive comparison. I looked at the toupper C > > macro and while it works, i was wondering about peformance ( it  seems to > > do a lot of checking). > > B > > Would it be faster to just have an array of 256 bytes and just lookupC > > the translated character based on the value of the untranslated  > > character ?  > ) > have you looked at  _toupper/_tolower ?   E _toupper is only valid if the character is upper case and _tolower if B it is lower so would need to test with isupper etc. first which is( probably much the same as using toupper.   Martin Kirby   ------------------------------   Date: 2 Mar 2005 01:22:32 -0800  From: martinkirby12@yahoo.co.uk / Subject: Re: DECC : toupper/tolower performance C Message-ID: <1109755352.034820.131910@g14g2000cwa.googlegroups.com>   > How do you need to treat locales? If you are sticking with DEC3 Multinational character set then can't you just use D str$case_blind_compare? If you need C Locale support then toupper is probably the only way to go.  D If you are purely 7-bit ASCII then the translation table may get youG extra benefit in allowing the compiler to optimise the code better than  a function call does.   D Personally, I would use toupper if that best reflects the design andE then replace it if, and only if, PCA showed the surrounding functions  were performance hot spots.    Martin Kirby   ------------------------------   Date: 2 Mar 2005 07:40:31 -0600 ; From: koehler@eisner.nospam.encompasserve.org (Bob Koehler) / Subject: Re: DECC : toupper/tolower performance 3 Message-ID: <rKLAfVNX2FVS@eisner.encompasserve.org>   e In article <1109754764.821036.210030@z14g2000cwz.googlegroups.com>, martinkirby12@yahoo.co.uk writes:  > G > _toupper is only valid if the character is upper case and _tolower if D > it is lower so would need to test with isupper etc. first which is* > probably much the same as using toupper.  D    Nonsense.  I run entire strings through _toupper all the time andE    it does exactly what is expected:  alpha's come out all upper case 4    no matter how they went in, others are unchanged.  C    Of course, I'm working in ASCII, for which _toupper was written.    ------------------------------  # Date: Wed, 02 Mar 2005 14:23:44 GMT * From: "FredK" <fred.nospam@nospam.dec.com>/ Subject: Re: DECC : toupper/tolower performance 0 Message-ID: <Q%jVd.841$Jt4.323@news.cpqcorp.net>  F It does a range check for the graphic characters in both halves of theA MCS range, and does the exception check for (in the MCS case) the D character (0xF0) which is blank.  MCS was designed to be be symetric? for case conversion (the 0xF0 check is IMHO not needed - as the G entry itself is blank).  For ISO Latin-1 things like the multiplication G symbol and division are in the graphic character range as one exception  for example.    : "JF Mezei" <jfmezei.spamnot@teksavvy.com> wrote in message< news:1109761240.60a928897764b36c76dce27e6159ce6d@teranews..." > martinkirby12@yahoo.co.uk wrote: > > B > > How do you need to treat locales? If you are sticking with DEC7 > > Multinational character set then can't you just use  > > str$case_blind_compare?  > / > How does it do it ? (do the blind comparison)  > J > I need 2 things initially:  insert an item into an sorted XmList widget.F > Secondly, a substring search within an XmList. (for instance, if youJ > have items that contain first name, last name, I want to be able to find > by searching for last name.  > I > The insertion has to be case insensitive and I should also do it accent  > insensitive (eg:  < f)  > " > Right now, ISO-LATIN1 is enough. > G > I've looked at current MOTIF source for XmString and there is so much G > overhead in just extracting the character data (I don't know how many E > subroutine calls are done and then a malloc to create a copy of the * > characters). I'd like to streamline this > H > Eventually, the case insensitive logic will also be used to search forJ > text in either XmText widgets or record by record search of many "files" > (library modules). > H > > Personally, I would use toupper if that best reflects the design andI > > then replace it if, and only if, PCA showed the surrounding functions  > > were performance hot spots.  > J > By default, toupper doesn't do ISO-LATIN-1. At least not on VAX with theC > default definition of toupper (which only tests between a and z).    ------------------------------   Date: 2 Mar 2005 05:57:19 -0800  From: martinkirby12@yahoo.co.uk / Subject: Re: DECC : toupper/tolower performance C Message-ID: <1109771839.489566.167530@g14g2000cwa.googlegroups.com>    Bob Koehler wrote:E > In article <1109754764.821036.210030@z14g2000cwz.googlegroups.com>, ! martinkirby12@yahoo.co.uk writes:  > > F > > _toupper is only valid if the character is upper case and _tolower ifF > > it is lower so would need to test with isupper etc. first which is, > > probably much the same as using toupper. > F >    Nonsense.  I run entire strings through _toupper all the time andG >    it does exactly what is expected:  alpha's come out all upper case 6 >    no matter how they went in, others are unchanged. > E >    Of course, I'm working in ASCII, for which _toupper was written.   G >From the "HP C Run-time Library Reference Manual for OpenVMS Systems", 
 V8.2 version:    "Description  D The _tolower macro is equivalent to the tolower function except thatC its argument must be an uppercase letter (not lowercase, not EOF)."   5 So the fact that it works is not supported behaviour.    Martin Kirby   ------------------------------  % Date: Wed, 02 Mar 2005 06:03:07 -0800 # From: "Tom Linden" <tom@kednos.com> / Subject: Re: DECC : toupper/tolower performance ( Message-ID: <opsm0jzholzgicya@hyrrokkin>  J On Wed, 2 Mar 2005 08:48:13 +0100, Rudolf Wingert <win@fom.fgan.de> wrote:   > Hello, > F > I think the fastes way is to use table lookup. Under OpenVMS VAX youE > will have a MACRO instruction (TRANS???). Under OpenVMS AXP I don't  > know.  >  > Best regards R. Wingert  >   H If you have PL/I, here is a snippet which works for strings with mixed   mini-  majuscules.   " dcl (uc_table,lc_table) char(256);! dcl (translate, collate) builtin;   $     uc_table = translate(	collate(),5                       		'ABCDEFGHIJKLMNOPQRSTUVWXYZ', 6                       		'abcdefghijklmnopqrstuvwxyz');$     lc_table = translate(	collate(),5                       		'abcdefghijklmnopqrstuvwxyz', 6                       		'ABCDEFGHIJKLMNOPQRSTUVWXYZ');  0 string = translate(string, uc_table, collate());       --  C Using Opera's revolutionary e-mail client: http://www.opera.com/m2/    ------------------------------   Date: 2 Mar 2005 09:25:26 -0600 - From: Kilgallen@SpamCop.net (Larry Kilgallen) / Subject: Re: DECC : toupper/tolower performance 3 Message-ID: <y9nkN8r7pRwT@eisner.encompasserve.org>   ^ In article <001401c51efc$2fe9cad0$994614ac@wat153>, "Rudolf Wingert" <win@fom.fgan.de> writes: > Hello, > F > I think the fastes way is to use table lookup. Under OpenVMS VAX you+ > will have a MACRO instruction (TRANS???).   B That instruction does do memory references to the table, incurring' the overhead described in a prior post.    ------------------------------  % Date: Wed, 02 Mar 2005 11:11:07 -0500 ' From: Dave Froble <davef@tsoft-inc.com> / Subject: Re: DECC : toupper/tolower performance 0 Message-ID: <112bos55d9apse6@corp.supernews.com>   JF Mezei wrote: I > The insertion has to be case insensitive and I should also do it accent  > insensitive (eg:  < f)   H That's interesting.  How do you handle such?  Both upper and lower case . accent characters have ascii values above 190.   ------------------------------  % Date: Wed, 02 Mar 2005 08:58:51 -0800 # From: "Tom Linden" <tom@kednos.com> / Subject: Re: DECC : toupper/tolower performance ( Message-ID: <opsm0r4dg8zgicya@hyrrokkin>  G On Wed, 02 Mar 2005 11:11:07 -0500, Dave Froble <davef@tsoft-inc.com>    wrote:   > JF Mezei wrote: J >> The insertion has to be case insensitive and I should also do it accent >> insensitive (eg:  < f) > K > That's interesting.  How do you handle such?  Both upper and lower case   0 > accent characters have ascii values above 190.  E How does one change character set, e.g. to say ISO 8859-1 on the fly?      --  C Using Opera's revolutionary e-mail client: http://www.opera.com/m2/    ------------------------------  % Date: Wed, 02 Mar 2005 08:19:29 -0800 ' From: David Mathog <mathog@caltech.edu> , Subject: Re: Fiorina and The Peter Principle+ Message-ID: <d04p2h$moo$1@naig.caltech.edu>    John Smith wrote:     E > ASHINGTON, March 1 - Carleton S. Fiorina, who lost her job as chief N > executive of Hewlett-Packard almost three weeks ago, has emerged as a strongN > candidate to become president of the World Bank, according to an official in > the Bush administration. <SNIP>M > With this choice, President Bush would have a chance to name his own person + > to be the spokesman for the world's poor.   G The irony of Carly speaking for the world's poor cannot be overstated.  F Her first words in that role would doubtless be:  "Let them eat cake."    
 > As the head N > of a Fortune 500 company for six years, she gained executive experience thatM > put her near the top of the list for the job. She would also add glamour as E > probably the only candidate famous enough to be widely known by her  > nickname - Carly.    Form over substance.  5 By what metric is HP a better company now than it was  when she took over?    > E > Lael Brainard, director of the poverty and global initiative at the M > Brookings Institute, said, "Her candidacy is within the traditional mold in J > that America has on occasion gone to someone with a proven record in theI > corporate world because, at the end of the day, the World Bank is a big  > management challenge."  F Proven record alright, but not in a good sense.  Bush would only name @ her to the World Bank if he wanted to destroy that institutiion.   Regards,   David Mathog mathog@caltech.edu   ------------------------------  # Date: Wed, 02 Mar 2005 17:30:56 GMT % From: "John Vottero" <John@mvpsi.com> , Subject: Re: Fiorina and The Peter Principle> Message-ID: <kLmVd.15605$hU7.13713@newssvr33.news.prodigy.com>  / "John Smith" <a@nonymous.com> wrote in message  & news:47Sdnb7wLpaYXbjfRVn-iw@igs.net...F > http://www.nytimes.com/2005/03/02/business/worldbusiness/02bank.html >  > March 2, 2005 ) > Fiorina Called Candidate for World Bank  > By ELIZABETH BECKER  > E > ASHINGTON, March 1 - Carleton S. Fiorina, who lost her job as chief H > executive of Hewlett-Packard almost three weeks ago, has emerged as a  > strongL > candidate to become president of the World Bank, according to an official  > in > the Bush administration.  D The World Bank uses OpenVMS.  Wouldn't it be ironic if Carly starts % demanding better handling of OpenVMS!    ------------------------------   Date: 2 Mar 2005 07:12:36 -0600 - From: Kilgallen@SpamCop.net (Larry Kilgallen)  Subject: Re: GBLSECTIONS loop 3 Message-ID: <rXrqF4r4puRp@eisner.encompasserve.org>   q In article <+mHGgWFBvKsD@eisner.encompasserve.org>, koehler@eisner.nospam.encompasserve.org (Bob Koehler) writes: b > In article <IYWdnSUs0I_eSbnfRVn-rg@megapath.net>, "Paul Dembry" <pade@nospam.trifox.com> writes:N >> When I boot, decwinwdows does not come up because there are not enough freeN >> GBLSECTIONS. The message says that I need 426 and I only have 210. AutobootM >> offers to regen to fix this and I answer yes. It goes through the generate F >> and update phase, the system reboots and I still only have 210 freeL >> GBLSECTIONS. How do I increase this? I tried modifying the parameter file >> but to no avail. 
 >> Thanks, >> Paul  > G >    The offer by AUTOGEN to fix this never works.  Do a conversational E >    boot, put the parameter into sys$system:modparams.dat, and do an  >    autogen by hand.   G The offer by AUTOGEN sometimes works (it has for me - never say never).   F I think the flaw is in the underlying design of the ADD_xxx mechanism." Not that I have a better design...   ------------------------------  # Date: Wed, 02 Mar 2005 12:05:31 GMT # From: Beach Runner <bob@nospam.com> 3 Subject: Re: Has anyone had any bad T4 experiences? < Message-ID: <f_hVd.123282$qB6.29305@tornado.tampabay.rr.com>   EP is about your best option.  Unless you use someone's hack.     David J Dachtera wrote:  > Beach Runner wrote:  >  >>David J Dachtera wrote:  >> >> >>>Thomas Wirt wrote:  >>>  >>> D >>>>I am preparing to install T4 on my AS 4100's (VMS 7.3-1) and wasA >>>>wondering what experiences anyone else had had.  Does it work O >>>>seamlessly?  Any crashes or performance hits?  Is it as useful as it looks?  >>>  >>> I >>>Trouble with T4 is, its a collector - ONLY. The truly useful bit - the G >>>reporting and analysis pieces - remain MIA (ever since the demise of  >>>PSPA and SPM).  >>>  >>F >>No engineering and Colorado Support have tools they can use with theD >>data.  Chances are if you have a problem you'll get them involved. >  > > > Well, my problem is management asking for ad-hoc performanceE > reports/analysis on zero notice, not to mention wanting to see them H > regularly. (I.e., they expect to output like we used to give them fromC > SPM and/or PSPA regularly and on-demand). Can they help me there?  >    ------------------------------  $ Date: Wed, 2 Mar 2005 09:55:55 -0500' From: "Main, Kerry" <kerry.main@hp.com> 3 Subject: RE: Has anyone had any bad T4 experiences? R Message-ID: <FD827B33AB0D9C4E92EACEEFEE2BA2FB594B60@tayexc19.americas.cpqcorp.net>   > -----Original Message-----/ > From: Beach Runner [mailto:bob@nospam.com]=20  > Sent: March 2, 2005 7:06 AM  > To: Info-VAX@Mvb.Saic.Com 5 > Subject: Re: Has anyone had any bad T4 experiences?  >=20 > EP is about your best option.   > Unless you use someone's hack. >=20 >=20 > David J Dachtera wrote:  > > Beach Runner wrote:  > >=20 > >>David J Dachtera wrote:  > >> > >> > >>>Thomas Wirt wrote:  > >>>  > >>> F > >>>>I am preparing to install T4 on my AS 4100's (VMS 7.3-1) and wasC > >>>>wondering what experiences anyone else had had.  Does it work @ > >>>>seamlessly?  Any crashes or performance hits?  Is it as=20 > useful as it looks?  > >>>  > >>> = > >>>Trouble with T4 is, its a collector - ONLY. The truly=20  > useful bit - theB > >>>reporting and analysis pieces - remain MIA (ever since the=20 > demise of  > >>>PSPA and SPM).  > >>>  > >>H > >>No engineering and Colorado Support have tools they can use with theF > >>data.  Chances are if you have a problem you'll get them involved. > >=20 > >=20@ > > Well, my problem is management asking for ad-hoc performanceG > > reports/analysis on zero notice, not to mention wanting to see them > > > regularly. (I.e., they expect to output like we used to=20 > give them fromE > > SPM and/or PSPA regularly and on-demand). Can they help me there?  > >=20 >=20  D As an additional fyi, while I know some folks have had issues in theG past with CA, they do seem to be wanting to change their image and from B an OpenVMS specific perspective, they have been attending numerousE recent OpenVMS events (including Ambassador meetings) promoting their  OpenVMS offerings.  B It might not hurt to investigate what their current pricing is forE products like their performance products for OpenVMS. Apparently (not B sure) they have enhanced the DECps product they bought and droppedB prices. Their perf product not only does reporting, but also makes8 recommendations, chargeback and resource accounting etc.  6 Perhaps ask them for a 30 day free loaner to test etc.  B They have also ported their console management solution to OpenVMS Itanium as well.  
 Reference:% www.cai.com/openvms (CA OpenVMS page) H http://www3.ca.com/Solutions/Product.asp?ID=3D1174 (Performance product)G http://www3.ca.com/Solutions/CollateralList.asp?CCT=3D19537&ID=3D1174 =  (PDF	 brochure)    Regards     
 Kerry Main Senior Consultant  HP Services Canada Voice: 613-592-4660  Fax: 613-591-4477  kerryDOTmainAThpDOTcom (remove the DOT's and AT)=20  $ "OpenVMS has always had integrity .. Now, Integrity has OpenVMS .."   ------------------------------  $ Date: Wed, 2 Mar 2005 10:27:09 -0500 From: norm.raphael@metso.com3 Subject: Re: Has anyone had any bad T4 experiences? Q Message-ID: <OFB7908E9D.94912C38-ON85256FB8.0054BE40-85256FB8.00552529@metso.com>   I David J Dachtera <djesys.nospam@comcast.net> wrote on 03/01/2005 08:40:08  PM:    > Beach Runner wrote:  > >  > > David J Dachtera wrote:  > >  > > > Thomas Wirt wrote: > > > F > > >>I am preparing to install T4 on my AS 4100's (VMS 7.3-1) and wasC > > >>wondering what experiences anyone else had had.  Does it work D > > >>seamlessly?  Any crashes or performance hits?  Is it as useful > as it looks? > > >  > > > H > > > Trouble with T4 is, its a collector - ONLY. The truly useful bit - the J > > > reporting and analysis pieces - remain MIA (ever since the demise of > > > PSPA and SPM). > > >  > > H > > No engineering and Colorado Support have tools they can use with theF > > data.  Chances are if you have a problem you'll get them involved. > > > Well, my problem is management asking for ad-hoc performanceE > reports/analysis on zero notice, not to mention wanting to see them H > regularly. (I.e., they expect to output like we used to give them fromC > SPM and/or PSPA regularly and on-demand). Can they help me there?   G Have you considered PAWZ from http://www.perfcap.com who did ECP before ( they were exiled to the wilds of Nashua.     >  > -- > David J Dachtera > dba DJE Systems  > http://www.djesys.com/ > + > Unofficial OpenVMS Hobbyist Support Page: $ > http://www.djesys.com/vms/support/ > * > Unofficial Affordable OpenVMS Home Page:! > http://www.djesys.com/vms/soho/  > $ > Unofficial OpenVMS-IA32 Home Page:! > http://www.djesys.com/vms/ia32/  >  > Coming soon:( > Unofficial OpenVMS Marketing Home Page   ------------------------------  % Date: Wed, 02 Mar 2005 03:11:26 -0500 - From: JF Mezei <jfmezei.spamnot@teksavvy.com> 1 Subject: Re: Has the shine come off of Microsoft? B Message-ID: <1109750326.353bf5d97d970f24ed70aa04b9581973@teranews>   John Smith wrote:   D > But who doesn't *want* a Ferra......er....robust systems, disaster: > tolerance, investment protection, immunity from viruses?    H This is very different. Ferraris and other luxury cars are vanity items.H Except for a few highways in the world, all have speed limits well below what your ferrari can do.   E When you're in a business, you define your needs and realise that you C can deliver your pizzas on time in a reliable enough fashion with a D LADA, and that the savings from buying a really cheap cars more thanH make up for the few times where you have to give pizzas for free because! you didn't deliver in 30 minutes.   P VMS shoudln't be compared to sports cars, it should be compared to 4wd vehicles.  @ Subaru advertised iots "Outback" as being able to go anywhere in? australia's outback. But in reality, that car is rarely seen in E australia because it just isn't able to go into the outback. (lack of H wheel clearance, lack of ability to lock all 4 wheels (no differential).  H Plenty of cars advertise themselves as being able to go ion the outback.H But in the end, the serious people get Toyota landrunners or RangeroversG because those two are the vehicles truly designed to go to the outback.   H We're talking about proper traction options, we're talking about abilityE to resist sand (virus in computer terms) and that the sand dust won't 1 clog up your air filter in 20 minutes of driving.   F The general public influended by TV/magazine ads will not realise thatG the Subaru Outback (and other urban trendy vehicles) juist doN't cut it C in the real wilderness, and in fairness, they don't really need all 5 these functions for the urban driving they are doing.   E But the makers of the real outback vehicles could destroy those urban H ones by advertsing the features that they have but that the urban trendy vehicles don't have.   ----  B There is however one big difference between vehciles and operatingG systems.  Vehicles take industry standard gasoline, oil, tyres and have > industry standard steering weeels and pedal positions. This isK tantamount to servers having the ability to run industry standard software.   = And this is where VMS fails: it doesn't run industry standard H applications. This is where work must be done. Think of a propane powereD outback vehicles crossing australia with no propane refueling stops.   ------------------------------  $ Date: Wed, 2 Mar 2005 12:00:52 -0500< From: "Peter Weaver" <WeaverConsultingServices@sympatico.ca>1 Subject: Re: Has the shine come off of Microsoft? , Message-ID: <38m9q7F5po715U1@individual.net>   Dave Froble wrote: >.. H > But I am working on getting a Long-EZ flying this year.  Blow off most > Ferraris.  :-)  E Now that would be in my "Need" column. I saw one flying in the area a G few times last summer, but I never had a chance get a close look at it, " nice plane from what I saw though.   --   Peter Weaver Weaver Consulting Services Inc.  Canadian VAR for CHARON-VAX  www.weaverconsulting.ca    ------------------------------   Date: 2 Mar 2005 10:25:59 -0800 ! From: jy@dymaxion.ca (June Young) B Subject: How to reset environment at the beginning of each request= Message-ID: <d1160002.0503021025.1f8bc52c@posting.google.com>    Hi,   B I am running CSWS1.3 on OpenVMS 7.3-2. I have quite a few job wideE logicals set up in the login.com. My problem is that mod_perl intends E to cleanup all environment variables used by the script at the end of E each request. So if the removed logicals are used in my rewrite rules 1 or used by the next DCL cgi script, error occurs.   C Is there a general hook to the post-read-request handler that I can F run a com file to reset the logicals at the beginning of each request?B I tried to use a PerlPostReadRequestHandler, but it only works for perl cgi, not other request.  
 June Young   ------------------------------  * Date: Wed, 2 Mar 2005 11:40:29 +0000 (UTC) From: david20@alpha2.mdx.ac.ukS Subject: RE: Interesting error message I just got trying to access accuwea	ther.com ) Message-ID: <d048nd$4mq$1@news.mdx.ac.uk>    In article <00A40217.187E5C08@SSRL.SLAC.STANFORD.EDU>, winston@SSRL.SLAC.STANFORD.EDU (Alan Winston - SSRL Central Computing) writes:  >In article <DA4AD590CAF06845B671C398333A89C6082E2662@ohms.electric.ci.austin.tx.us>, "Stuart, Ed" <Ed.Stuart@austinenergy.com> writes: J >> Interestingly enough, the accuweather servers are not reporting what OS) >>they are running according to Netcraft.  >>4 >>OS  Server Last changed IP address Netblock Owner C >>unknown  OSU/3.9c;UCX  9-Nov-2003  207.242.93.24   Accuweather    > >>unknown  unknown  8-Nov-2003  207.242.93.24   Accuweather   D >>unknown  OSU/3.9c;UCX  28-Mar-2002  207.242.93.24   Accuweather   F >>unknown  OSU/3.8aw2;UCX  26-Feb-2002  207.242.93.24   Accuweather   D >>unknown  OSU/3.9c;UCX  25-Feb-2002  207.242.93.24   Accuweather   F >>unknown  OSU/3.8aw2;UCX  24-Feb-2002  207.242.93.24   Accuweather   D >>unknown  OSU/3.9c;UCX  22-Feb-2002  207.242.93.24   Accuweather   J >>Compaq Tru64  OSU/3.8aw2;UCX  6-Mar-2001  207.242.93.24   Accuweather   M >>Compaq Tru64  Microsoft-IIS/5.0  5-Mar-2001  207.242.93.24   Accuweather    H >>Compaq Tru64  OSU/3.8aw2;UCX  3-Mar-2001  207.242.93.24   Accuweather  >  > J >That's kind of the fault of the OSU webserver, which doesn't provide thatJ >information and doesn't give you a way to configure that information intoG >the reply stream.  You'd have to change the source code and recompile.  > 4 As I reported in a previous posting that isn't true.@ Netcraft reports that I'm running OpenVMS with OSU 3.10a and UCX see   : http://uptime.netcraft.com/up/graph/?host=alpha2.mdx.ac.uk    K It also shows historical records which also show that I was running OSU 3.8p with UCX on OpenVMS in 2002.  
 David Webb Security team leader CCSS Middlesex University  H >Naturally, this leaves VMS underrepresented in Netcraft's total counts. >e9 >But if they're running OSU and UCX, they're running VMS.r >l >-- Alan   ------------------------------  # Date: Wed, 02 Mar 2005 12:32:44 GMTrL From: winston@SSRL.SLAC.STANFORD.EDU (Alan Winston - SSRL Central Computing)S Subject: RE: Interesting error message I just got trying to access accuwea	ther.comr6 Message-ID: <00A40269.579088D1@SSRL.SLAC.STANFORD.EDU>  J In article <d048nd$4mq$1@news.mdx.ac.uk>, david20@alpha2.mdx.ac.uk writes: >In article <00A40217.187E5C08@SSRL.SLAC.STANFORD.EDU>, winston@SSRL.SLAC.STANFORD.EDU (Alan Winston - SSRL Central Computing) writes: >>In article <DA4AD590CAF06845B671C398333A89C6082E2662@ohms.electric.ci.austin.tx.us>, "Stuart, Ed" <Ed.Stuart@austinenergy.com> writes:K >>> Interestingly enough, the accuweather servers are not reporting what OSu* >>>they are running according to Netcraft. >>>t5 >>>OS  Server Last changed IP address Netblock Owner  D >>>unknown  OSU/3.9c;UCX  9-Nov-2003  207.242.93.24   Accuweather   ? >>>unknown  unknown  8-Nov-2003  207.242.93.24   Accuweather   nE >>>unknown  OSU/3.9c;UCX  28-Mar-2002  207.242.93.24   Accuweather   uG >>>unknown  OSU/3.8aw2;UCX  26-Feb-2002  207.242.93.24   Accuweather   fE >>>unknown  OSU/3.9c;UCX  25-Feb-2002  207.242.93.24   Accuweather   tG >>>unknown  OSU/3.8aw2;UCX  24-Feb-2002  207.242.93.24   Accuweather    E >>>unknown  OSU/3.9c;UCX  22-Feb-2002  207.242.93.24   Accuweather   sK >>>Compaq Tru64  OSU/3.8aw2;UCX  6-Mar-2001  207.242.93.24   Accuweather   iN >>>Compaq Tru64  Microsoft-IIS/5.0  5-Mar-2001  207.242.93.24   Accuweather   I >>>Compaq Tru64  OSU/3.8aw2;UCX  3-Mar-2001  207.242.93.24   Accuweather s >> >>K >>That's kind of the fault of the OSU webserver, which doesn't provide thatnK >>information and doesn't give you a way to configure that information intoaH >>the reply stream.  You'd have to change the source code and recompile. >>5 >As I reported in a previous posting that isn't true. A >Netcraft reports that I'm running OpenVMS with OSU 3.10a and UCXt >see >i; >http://uptime.netcraft.com/up/graph/?host=alpha2.mdx.ac.uki >r >eL >It also shows historical records which also show that I was running OSU 3.8 >with UCX on OpenVMS in 2002.   M NetCraft may have been beaten up enough to recognize OSU as being on VMS, but % look at what OSU 3.10alpha gives you:t  ) HTTP/1.0 404 200 Sending data and caching- MIME-version: 1.0- Server: OSU/3.10alpha;UCX0 Content-type: text/html  Content-transfer-encoding: 8bit , Last-Modified: Tue, 05 Feb 2002 13:34:45 GMT Content-length: 256D# Date: Wed, 02 Mar 2005 12:08:08 GMTw    4 Do you see "VMS" or "OpenVMS" in the Server: header?   -- Alan    ------------------------------  * Date: Wed, 2 Mar 2005 13:03:05 +0000 (UTC) From: david20@alpha2.mdx.ac.ukS Subject: RE: Interesting error message I just got trying to access accuwea	ther.comh) Message-ID: <d04di9$6q0$1@news.mdx.ac.uk>u   In article <00A40269.579088D1@SSRL.SLAC.STANFORD.EDU>, winston@SSRL.SLAC.STANFORD.EDU (Alan Winston - SSRL Central Computing) writes:pK >In article <d048nd$4mq$1@news.mdx.ac.uk>, david20@alpha2.mdx.ac.uk writes:  >>In article <00A40217.187E5C08@SSRL.SLAC.STANFORD.EDU>, winston@SSRL.SLAC.STANFORD.EDU (Alan Winston - SSRL Central Computing) writes:e >>>In article <DA4AD590CAF06845B671C398333A89C6082E2662@ohms.electric.ci.austin.tx.us>, "Stuart, Ed" <Ed.Stuart@austinenergy.com> writes: L >>>> Interestingly enough, the accuweather servers are not reporting what OS+ >>>>they are running according to Netcraft.T >>>>6 >>>>OS  Server Last changed IP address Netblock Owner E >>>>unknown  OSU/3.9c;UCX  9-Nov-2003  207.242.93.24   Accuweather   r@ >>>>unknown  unknown  8-Nov-2003  207.242.93.24   Accuweather   F >>>>unknown  OSU/3.9c;UCX  28-Mar-2002  207.242.93.24   Accuweather   H >>>>unknown  OSU/3.8aw2;UCX  26-Feb-2002  207.242.93.24   Accuweather   F >>>>unknown  OSU/3.9c;UCX  25-Feb-2002  207.242.93.24   Accuweather   H >>>>unknown  OSU/3.8aw2;UCX  24-Feb-2002  207.242.93.24   Accuweather   F >>>>unknown  OSU/3.9c;UCX  22-Feb-2002  207.242.93.24   Accuweather   L >>>>Compaq Tru64  OSU/3.8aw2;UCX  6-Mar-2001  207.242.93.24   Accuweather   O >>>>Compaq Tru64  Microsoft-IIS/5.0  5-Mar-2001  207.242.93.24   Accuweather   SJ >>>>Compaq Tru64  OSU/3.8aw2;UCX  3-Mar-2001  207.242.93.24   Accuweather  >>>  >>>iL >>>That's kind of the fault of the OSU webserver, which doesn't provide thatL >>>information and doesn't give you a way to configure that information intoI >>>the reply stream.  You'd have to change the source code and recompile.m >>> 6 >>As I reported in a previous posting that isn't true.B >>Netcraft reports that I'm running OpenVMS with OSU 3.10a and UCX >>seea >>< >>http://uptime.netcraft.com/up/graph/?host=alpha2.mdx.ac.uk >> >>M >>It also shows historical records which also show that I was running OSU 3.8a >>with UCX on OpenVMS in 2002. >nN >NetCraft may have been beaten up enough to recognize OSU as being on VMS, but& >look at what OSU 3.10alpha gives you: >o* >HTTP/1.0 404 200 Sending data and caching >MIME-version: 1.0 >Server: OSU/3.10alpha;UCX >Content-type: text/html  >Content-transfer-encoding: 8bit- >Last-Modified: Tue, 05 Feb 2002 13:34:45 GMTo >Content-length: 256$ >Date: Wed, 02 Mar 2005 12:08:08 GMT >- >-5 >Do you see "VMS" or "OpenVMS" in the Server: header?d >mM Sorry all I meant was that Netcraft can either determine or has been setup to 1 assume that anyone running OSU is running on VMS.oM I fully accept that OSU doesn't return that information in the server header.o  
 David Webb Security team leader CCSS Middlesex University     >-- Alan   ------------------------------  $ Date: Wed, 2 Mar 2005 10:51:54 +01000 From: "giovanni lo conti" <mc4386@fastwebnet.it> Subject: Media  7.3.2 9 Message-ID: <W0gVd.76044$2h5.41993@tornado.fastwebnet.it>O  I Sto utilizzando su una pws alpha la versione 7.3 di openvms, ma mi sembraYF piuttosto datata; c' qualcuno disponibile a fornirmi le copie dei cd,@ chiaramente pagando le spese?. Solo i CD non le lecenze, che ho. Grazie,- giovanni   ------------------------------   Date: 2 Mar 2005 07:49:48 -0600i; From: koehler@eisner.nospam.encompasserve.org (Bob Koehler)n Subject: Re: Media  7.3.2O3 Message-ID: <f5GbWK9UGZ2Z@eisner.encompasserve.org>e  m  In article <W0gVd.76044$2h5.41993@tornado.fastwebnet.it>, "giovanni lo conti" <mc4386@fastwebnet.it> writes:oK > Sto utilizzando su una pws alpha la versione 7.3 di openvms, ma mi sembraFH > piuttosto datata; c' qualcuno disponibile a fornirmi le copie dei cd,B > chiaramente pagando le spese?. Solo i CD non le lecenze, che ho.	 > Grazie,L
 > giovanni        bablefish provides:d  gE >   I am using on pws alpha a version 7,3 of openvms, but me it seemssH >dated rather; there is someone available one to supply the copies to meH >of the cd, clearly paying expenses. Only the CD not the lecenze, that I >have. Thanks, Giovannie   G     I think he just wants the 7.3-2 kit, but VMS 7.3 is the latest and  F     greatest that many people have.  8.2 has shipped for Alpha, but I 3     don't know if it runs on a PWS.  Check the SPD.d  .     back to bablefish:  <L     VMS 7.3  il pi ritardato e pi grande che la maggior parte della genteI     abbia. 8.2 hanno spedito per l'alfa, ma non so se funziona su un PWS.n     Controlli lo SPD.o  n   ------------------------------  % Date: Wed, 02 Mar 2005 06:08:35 -0800l# From: "Tom Linden" <tom@kednos.com>w Subject: Re: Media  7.3.2w( Message-ID: <opsm0j8lkpzgicya@hyrrokkin>  6 On Wed, 2 Mar 2005 10:51:54 +0100, giovanni lo conti   <mc4386@fastwebnet.it> wrote:   2 > Sto utilizzando su una pws alpha la versione 7.3  > Sto utilizzando su una pws 600au la versione 8.2 per sei mesi.   -- nC Using Opera's revolutionary e-mail client: http://www.opera.com/m2/-   ------------------------------  $ Date: Wed, 2 Mar 2005 09:37:54 -0600# From: "Dan Moore" <dmoore@sosu.edu>e) Subject: Re: mime encode message in batchc* Message-ID: <L5lVd.3114$sO4.1436@fe04.lga>  I I have been bothered by this problem for years. I may just be unaware of hI something simple, but I believe this should be made easier do deal with, eJ especially for sites that use OpenVMS to host e-commerce web sites, which I ours does nicely. Multinet provides a mime feature from the mail command:p       $mail/for/type=1  F I guess we have to also modify the file attributes because the symbol ; ($send) I created points to a DCL procedure that does this:t  $ $ convert/fdl=ut:STREAM.FDL  'p1 'p13 $ mail/for/type=1 'p1 """''p2'""" /subj="""''p3'"""   ; Process software helped us with this a couple of years ago.    Dan   ! P.S: Here is the STREAM.FDL file:  SYSTEM/ SOURCE                                  VAX/VMSb   FILE BEST_TRY_CONTIGUOUS  noa# CONTIGUOUS                       nou, NAME                                      ""* ORGANIZATION                    sequential   RECORD$ BLOCK_SPAN                       yes' CARRIAGE_CONTROL        carriage_returnb, FORMAT                                stream- SIZE                                        0e    9 "Neil Freeman" <neil@holmelea.plus.com> wrote in message  < news:4224dd52$0$23601$ed2e19e4@ptn-nntp-reader04.plus.net...M > Can anyone tell me if it is possible to create a mime encoded message in a t  > batch process. Something like: >h  > $mime :== $sys$system:mime.exe > $mimet > new message.txt$ > <message body txt> > ctrl-z > add filename1.rtf  > add filename2.rftt > exitD > $mail/subject="Attached files" message.txt "someone@somewhere.com" >y >t > I just get a message saying:1 > Change mode can be entered only from a terminalu >i >    ------------------------------   Date: 1 Mar 2005 22:51:42 -0800h From: icerq4a@spray.se/ Subject: Re: new Itanium after Tukwila: Poulson C Message-ID: <1109746302.533365.192940@g14g2000cwa.googlegroups.com>-   Bill Todd wrote: > icerq4a@spray.se wrote:3 >0 > ...r > F > > I think the current information about the what the new Tukwila and theoG > > old Tukwila really is/was is not sufficient to make any really goodeF > > assumptions about them. There will be some changes in Montvale and4 > > Tukwila, perhaps IDF will give some light on it. >i@ > The only assumptions I was making were core-specific ones.  IfC > significant core changes appear in Montvale or Tukwila I'll be atr leastmG > somewhat surprised:  my impression is that Intel pretty much shot theu   > wad on Montecito.e  C Before Montecito details appeared many said that it was just a 90nmc shrink.n   > >rC > > If the new Tukwila is 4-core with good CSI it may become a good  chip,I > > even with an "old" core. > C > I agree, at least in the sense that EV7 was a 'good chip' despite  beingrC > saddled with an obsolescing core, leading-edge though it may have/ beenF > at introduction.  The Montecito core won't be similarly leading edgeG > when it debuts, but neither will it (presumably) be 4+ years old whena it > appears in Tukwila.  >cA > However, EV7 debuted at a time when no one else could match its F > large-system scalability (POWER4+ was pretty respectable, but topped outoG > at 32 cores).  That won't be the case when Tukwila appears:  POWER5'st  F > scalability is already remarkable, especially when you consider thatB > it's not a mesh architecture, and the high-core-count chips like NiagaramE > will offer a different approach to scalability which may also prover potent.  >a > ...b >@C > >>Intel could have had dual-core Itanics any time it wanted them.u ButsC > >>Itanic's appetite for on-chip cache is such that their per-core F > >>performance would have been even less impressive than it has been, > >o > > and  > > F > >>the decision to axe the Alpha Tukwila makes is clear that (just as > >  > > was  > >s? > >>the case with MHz until recently) Intel places a premium ons per-core; > >>performance even in server products which might well bea
 better-served  > >  > > by > >n( > >>more emphasis on overall throughput. > >  > >dA > > They could have gone down to the single-thread performance ofN0 > > Power/PA-RISC and then have room on the die. >c> > It's not clear that they noticeably exceeded the single-core performancecE > of POWER (in the same process generation) even *with* all the cachea they > had.  . They have been close with Itanium ahead a bit.  F > In 180 nm., POWER4 (with 1.44 MB of on-chip cache led McKinley (with 3tE > MB of on-chip cache) slightly in SPECint (yes, POWER4 had help fromhC > off-chip L3 cache, but at 90+ ns. latency it wasn't all that muchs fasterF > than the McKinley zx1's 154 ns. latency to main memory, and POWER4's- > main-memory latency was over 300 ns. IIRC).   C The L3 cache helped atleast much in SpecFP, less in SpecInt but notL
 negliable.  E > In 130 nm., POWER4+ fell somewhat behind as Madison's on-chip cachetG > increased in size to 6 MB while POWER4+'s remained about the same and5  F > its off-chip cache (and main memory) latency improved only slightly.G > But POWER5 caught up again (its on-chip cache expanded a bit to 2 MB,0  E > but its off-chip cache latency was reduced to 40+ ns. - still a lot1 moreF > than Madison's 10- ns.), and even Madison II's recent expansion to 9 MB: > of on-chip cache only allowed it to pull slightly ahead.  B The new Madison with 3Mb L3 is ahead the top-of-the-line POWER5 in SpecInt.  A > Of course, room on the die wasn't the only problem a multi-coren ItanicD > faced:  lacking the dramatic power reductions that are claimed for@ > Montecito, a dual-core Madison couldn't have run both cores at anything& > like full single-core Madison speed.   That is correct.   >   I think the large cachesA > > has more to do with multiprocessor scaling than single-threade > > performance. >yD > Then you should look harder at the SPECint results.  And, for thatG > matter, Itanic's MP scaling characteristics don't seem to be anythingc to > write home about.,  E What I try to say is that the main reasons for large L3 caches are to C alleviate for a less powerful system architecture. The upgrade, for0G example, to 9Mb from 6Mb does not do much for single-thread but it doesC increase the scalability.a  D The current 1.6GHz Itaniums with 3Mb cache do pretty good on SpecInt and SpecFP.R  = >   A Madison with 3Mb cache, that is _optimized_ for 3Mb and C > > not as the currently versions with disabled cache with very lowh6 > > associtativity, could have been doing pretty good. >'D > Since a lot of the 'optimization' relating to cache size occurs in theiF > compiler (specifically, during its profiling work, when it sees just how ? > well things are being cached), that assertion is not all that 
 > convincing.e  C I have seen Intel compiler people saying that the current profilingUB tools don't take cache size into consideration. Future ones may do though.e  =   And since the 6 MB Madison had extremely high associativityoB > to begin with (24-way, when the rule of thumb I remember is thatD > anything over about 8-way verges on over-kill:  perhaps 24-way was? > chosen precisely so that even very cut-down versions would be 
 adequate),F > it's even less so (the only reference I could find to a 3 MB MadisonE > indicated that its L3 cache had 12-way associativity; even POWER5's  new,$ > shared 2 MB cache is only 10-way).  E The associativity on the new Madisons L3 cache are 2-way per MB. That5B is 6-way associativity for a 3Mb version. As for the usage of highF associativity, IBM said that they increased associativity on all their3 caches in POWER5 which gave good performance boost.c   > >eF > > It looks like IBM also prefer fairly premium per-core performance. > E > How so?  They went to dual-core over 3 years ago in 180 nm., a size5G > where even with a large chip they could only squeeze 1.44 MB of cacheD onF > (less than EV7 managed for a *single* core in that process, and lessF > than half McKinley used for its single core - i.e., less than 1/4 asF > much per core).  And while the POWER core is certainly somewhat moreD > complex due to its support for single-thread performance, it's not clearaF > that its size could be *significantly* reduced by changing its focus to > multi-core throughput. >0F > Given that POWER4's off-chip L3 cache had close to main-memory-levelE > latency, IBM clearly had the *option* to load up the chip with mored> > cache but instead chose the multi-core route over the Itanic	 'optimize G > the single-core performance before all else' approach long ago.  Evenh  C > today, at 130 nm. it's not clear that they could fit, say, 4 evensG > simpler cores on a chip without jettisoning most or all the modest L2a  ! > on-chip cache that they've got.  >oA > So IBM appears to be using about as many cores as it can, while  ItanicB > manifestly is deprecating core count for cache size.  That makesE > POWER5's dramatic per-core superiority in commercial workloads only2 that > much more impressive.a  E I don't know if I said it correctly considering your response. What I-A tried to say is that IBM has not chosen a route with lots of slowSE performing cores in it's POWERX series, especially considering what Ix. have heard about POWER6 with high clock rates.   > >eG > > I really wonder how Niagara will actually do, I don't know how manycF > > would want to go back 5(?) years in single thread performance, but it* > > will atleast be interesting to see it. >eF > Why assume that it would be a significant backward step at all, from> > today's vantage point?  High-core-count chips just sacrifice
 relativelyF > small amounts of ultimate single-thread performance to allow them to usehD > shorter pipelines (resulting in both smaller and less power-hungryC > cores) and slightly slower clocks to match (resulting in yet moreo poweroA > reduction - not so much due to frequency per se as to the lower  voltageoB > and current required when you're not driving the hell out of the- > transistors to achieve maximum clock rate).   C Those who "upgrade" from say the latest UltraSparcs to Niagara willdF notice a significant downgrade in single-thread performance. I think a9 good guess is that one Niagara core has a SpecInt of 200?c  E > > The information I have is that Power6/6+ will be a dual-core chipa andaF > > most likely 4-way multithreading per core. It looks like Power7 is a  > > new design though. >nG > Thanks:  that's more than I've heard (this is, for example, the firsta  F > time I've heard any mention of a POWER7 at all:  can you suggest any) > good places to pick up more insights?).    Not on the net.   " >  But unless POWER6 will debut in@ > 130 nm. that kind of surprises me:  the existence of a POWER6+ product-C > suggests that the design is intended to live at least all the way" downD > to 65 nm. processes, where having only 2 cores on a chip will seemG > pretty silly (exactly the reverse of the POWER situation until today,   C > where having multiple cores has made them a leader in that area).E  C I made a mistake, the information I have does not talk specificallyo about 6+, only about 6.x   ------------------------------   Date: 1 Mar 2005 23:09:22 -0800  From: icerq4a@spray.se/ Subject: Re: new Itanium after Tukwila: Poulson C Message-ID: <1109747362.665205.292660@l41g2000cwc.googlegroups.com>    Dave Froble wrote: > icerq4a@spray.se wrote:  >a@ > > I think you are a bit confused here, the Prescott had 64-bit supporteG > > and the design decisions for that CPU must have been settled aroundnE > > 2000. Intel had decided that 64-bit x86 was parts of it's future,c buts > > they announced it late.G >BE > I think that ANYONE who doesn't understand that Intel was not going  toE > enable any 64 bit capability in IA-32 unless they were forced to is  not - > facing the reality that existed a year ago.e  F I find it very hard to believe that Intel made the core of a very highF volume product almost twice it's size and never use it. Not even IntelG can do that. I think Intel realized that x86 with 64-bit was inevitabletG in 1999, especially considering comments about Itanium is not a desktopvD chip. If they had announced or even designed an Itanium desktop chip& then it would have been another thing.  G > > As for competition with and without AMD. I really doubt the Pentiumk ProoE > > (P6) designers at Intel were saying that they didn't want to makea thetC > > fastest possible CPU. In the 90's, they wanted to beat PowerPC,s Alpha, > > PA-RISC, MIPS, Sparc.e >)D > But Intel didn't want IA-32 competing with IA-64.  They planned onA > controlling this situation.  Only outside forces caused them to- enable > EMT64.  2 I don't know what that has to do with what I said.   > > If AMD had not been around,y< > > PowerPC might have had a much larger market share today.- > > AMD has helped Intel in the x86 conquest.  > >b > G > Software has helped much more than any hardware.  That said, yes, AMD  is   > part of the equation.i >  > Dave   ------------------------------  % Date: Wed, 02 Mar 2005 02:39:13 -0500 ( From: Bill Todd <billtodd@metrocast.net>/ Subject: Re: new Itanium after Tukwila: Poulsonh= Message-ID: <I42dnUCyoL8-8LjfRVn-tg@metrocastcablevision.com>a   icerq4a@spray.se wrote:a > Dave Froble wrote: >  >>icerq4a@spray.se wrote:a >> >>? >>>I think you are a bit confused here, the Prescott had 64-bit  > 	 > support  > F >>>and the design decisions for that CPU must have been settled aroundD >>>2000. Intel had decided that 64-bit x86 was parts of it's future, >  > but  >  >>>they announced it late. >>E >>I think that ANYONE who doesn't understand that Intel was not goingr >  > to > E >>enable any 64 bit capability in IA-32 unless they were forced to ise >  > not. > - >>facing the reality that existed a year ago.  >  > H > I find it very hard to believe that Intel made the core of a very high9 > volume product almost twice it's size and never use it.5  I Dave appears to be right:  you are confused.  There's plenty of evidence  H from other processors which have moved from 32-bit to 64-bit data paths G that the increase in size required is well under 10%.  The main reason  C Prescott is so much bigger is because Intel increased its pipeline  E length significantly (from 20 stages to 30, IIRC) in its (ironically nF ineffective, due to the power consumed) quest for higher clock rates, ' not because it includes 64-bit support.a   - bill   ------------------------------  % Date: Wed, 02 Mar 2005 04:27:27 -0500 ( From: Bill Todd <billtodd@metrocast.net>/ Subject: Re: new Itanium after Tukwila: Poulsono= Message-ID: <L_adnduw4rudGrjfRVn-vw@metrocastcablevision.com>e   icerq4a@spray.se wrote:D > Bill Todd wrote: >  >>icerq4a@spray.se wrote:f >> >>...s >> >>E >>>I think the current information about the what the new Tukwila and, >  > thee > F >>>old Tukwila really is/was is not sufficient to make any really goodE >>>assumptions about them. There will be some changes in Montvale and)3 >>>Tukwila, perhaps IDF will give some light on it.p >>@ >>The only assumptions I was making were core-specific ones.  IfC >>significant core changes appear in Montvale or Tukwila I'll be atp >  > leasta > G >>somewhat surprised:  my impression is that Intel pretty much shot thet >  >  >>wad on Montecito.e >  > E > Before Montecito details appeared many said that it was just a 90nm 	 > shrink.P  G And before Madison appeared many said, entirely correctly, that it was =I just a McKinley shrink.  Given the relatively brief scheduled time lapse  B between Montecito and the following chips (vs. the 2.5 year lapse F between Madison and Montecito), expecting anything significant in the 0 way of core changes seems optimistic, as I said.   ...r  @ >>>They could have gone down to the single-thread performance of/ >>>Power/PA-RISC and then have room on the die.k >>> >>It's not clear that they noticeably exceeded the single-core > 
 > performancee > E >>of POWER (in the same process generation) even *with* all the cache  >  > they >  >>had. >  > 0 > They have been close with Itanium ahead a bit.  F And, as I noted, they have also been close with Itanic *behind* a bit.   >  > F >>In 180 nm., POWER4 (with 1.44 MB of on-chip cache led McKinley (with >  > 3: > E >>MB of on-chip cache) slightly in SPECint (yes, POWER4 had help fromuC >>off-chip L3 cache, but at 90+ ns. latency it wasn't all that muchC >  > faster > F >>than the McKinley zx1's 154 ns. latency to main memory, and POWER4's- >>main-memory latency was over 300 ns. IIRC).6 >  > E > The L3 cache helped atleast much in SpecFP, less in SpecInt but not  > negliable.  F It helped because POWER4's main-memory access was so much slower than H the small-system zx1 Itanic's.  But it didn't help much relative to zx1 I memory speeds because it wasn't all that much faster than they were, and  H when you're comparing core performance that's the issue rather than the D fact that POWER4's main-memory configuration was optimized for much  larger systems than zx1's was.   ...r  G >>But POWER5 caught up again (its on-chip cache expanded a bit to 2 MB,: >  > E >>but its off-chip cache latency was reduced to 40+ ns. - still a lots >  > more > F >>than Madison's 10- ns.), and even Madison II's recent expansion to 9 >  > MB > : >>of on-chip cache only allowed it to pull slightly ahead. >  > D > The new Madison with 3Mb L3 is ahead the top-of-the-line POWER5 in
 > SpecInt.  > Actually, AFAICT it only ties it, though beats it by a bit in H SPECint_base.  But it does provide an interesting insight into how much < additional SPECint performance tripling the cache size (and ) associativity) yields:  a hair under 10%.h   ...l  G > What I try to say is that the main reasons for large L3 caches are to 4 > alleviate for a less powerful system architecture.  F It's not clear that you're qualified to speak for Intel in that area. G Nor is it clear that the larger L3 caches increase scaling performance  G any more than they increase single-threaded performance, unless you've dC got some benchmark numbers to prove it (which I'd be interested in  I seeing, just not sufficiently interested to spend the time to try to dig f= up on my own, given that I suspect they may be hard to find)./     The upgrade, forI > example, to 9Mb from 6Mb does not do much for single-thread but it does  > increase the scalability.    By how much?   > F > The current 1.6GHz Itaniums with 3Mb cache do pretty good on SpecInt
 > and SpecFP.   F Not compared to current Intel x86 products with less cache, or to AMD G x86-64 products with *far* less cache (though in the latter case their i better memory latency helps).s   >  > = >>  A Madison with 3Mb cache, that is _optimized_ for 3Mb andi >>B >>>not as the currently versions with disabled cache with very low5 >>>associtativity, could have been doing pretty good.y >>D >>Since a lot of the 'optimization' relating to cache size occurs in >  > the  > F >>compiler (specifically, during its profiling work, when it sees just >  > howy > ? >>well things are being cached), that assertion is not all thate
 >>convincing.t >  > E > I have seen Intel compiler people saying that the current profiling 1 > tools don't take cache size into consideration.a  H They don't have to:  they see the *results* of the effects of the cache $ size and tweak the code accordingly.     Future ones may do	 > though.m > ? >   And since the 6 MB Madison had extremely high associativityu > B >>to begin with (24-way, when the rule of thumb I remember is thatD >>anything over about 8-way verges on over-kill:  perhaps 24-way was? >>chosen precisely so that even very cut-down versions would bea >  > adequate), > F >>it's even less so (the only reference I could find to a 3 MB MadisonE >>indicated that its L3 cache had 12-way associativity; even POWER5'su >  > new, > $ >>shared 2 MB cache is only 10-way). >  > G > The associativity on the new Madisons L3 cache are 2-way per MB. Thatn+ > is 6-way associativity for a 3Mb version.g  > Turns out we're both right:  the original Madison caches were F 4-way-associative per MB (corresponding to what I said above) but the G new Madison 9M series is only 2-way-associative per MB (as you said) - tH apparently the price they paid for increasing the top-of-the-line cache - size without taking more cycles to access it.   I Now, 6-way-associative (for the 3 MB cache size you seem enamored of) is  H still quite respectable, but if you think that's a problem by all means I come up with some benchmark comparisons with its 12-way 3 MB cousin that  F demonstrate it (since your earlier remarks about SPECint performance, F where the 6-way 3 MB L3 version trailed the 18-way 9 MB L3 version by  less than 10%, clearly don't).     As for the usage of highH > associativity, IBM said that they increased associativity on all their5 > caches in POWER5 which gave good performance boost.   I Unless you've got a breakdown of what changes contributed to what degree k? of increased performance, it seems likely that doubling the L1 nG associativity from 2-way to 4-way made most of the difference (L2 went -+ up only from 8-way to 10-way, for example).    >  > E >>>It looks like IBM also prefer fairly premium per-core performance.e >>E >>How so?  They went to dual-core over 3 years ago in 180 nm., a size>G >>where even with a large chip they could only squeeze 1.44 MB of cachei >  > on > F >>(less than EV7 managed for a *single* core in that process, and lessF >>than half McKinley used for its single core - i.e., less than 1/4 asF >>much per core).  And while the POWER core is certainly somewhat moreD >>complex due to its support for single-thread performance, it's not >  > clearA > F >>that its size could be *significantly* reduced by changing its focus >  > to >  >>multi-core throughput. >>F >>Given that POWER4's off-chip L3 cache had close to main-memory-levelE >>latency, IBM clearly had the *option* to load up the chip with morem> >>cache but instead chose the multi-core route over the Itanic >  > 'optimize  > G >>the single-core performance before all else' approach long ago.  Evene >  > C >>today, at 130 nm. it's not clear that they could fit, say, 4 eventG >>simpler cores on a chip without jettisoning most or all the modest L2e >  > ! >>on-chip cache that they've got.t >>A >>So IBM appears to be using about as many cores as it can, while  >  > Itanic > B >>manifestly is deprecating core count for cache size.  That makesE >>POWER5's dramatic per-core superiority in commercial workloads onlyu >  > that >  >>much more impressive.- >  > G > I don't know if I said it correctly considering your response. What IxC > tried to say is that IBM has not chosen a route with lots of slowcG > performing cores in it's POWERX series, especially considering what Ia0 > have heard about POWER6 with high clock rates.  F And what I responded was that POWERx has in fact placed about all the @ cores on its chips that it could, in marked contrast to Itanic. I However, they're not 'lots of slow cores':  they're lots of *fast* cores.s   >  > F >>>I really wonder how Niagara will actually do, I don't know how manyE >>>would want to go back 5(?) years in single thread performance, but  >  > it > ) >>>will atleast be interesting to see it.v >>F >>Why assume that it would be a significant backward step at all, from> >>today's vantage point?  High-core-count chips just sacrifice >  > relatively > F >>small amounts of ultimate single-thread performance to allow them to >  > use  > D >>shorter pipelines (resulting in both smaller and less power-hungryC >>cores) and slightly slower clocks to match (resulting in yet more> >  > power3 > A >>reduction - not so much due to frequency per se as to the lowerS > 	 > voltage- > B >>and current required when you're not driving the hell out of the- >>transistors to achieve maximum clock rate).  >  > E > Those who "upgrade" from say the latest UltraSparcs to Niagara will > > notice a significant downgrade in single-thread performance.  G Hmmm.  'A significant downgrade' seems quite a step back from 'go back n; 5(?) years in single thread performance', wouldn't you say?s     I think ar; > good guess is that one Niagara core has a SpecInt of 200?t  B That would mean that the entire chip would generate only slightly G greater overall throughput (at least as reflected by aggregate SPECint  E performance) than Sun's *current* dual-core products.  Do you really SG think that Sun would be going to the bother of designing and producing  D such a product, when simply moving its current products to the next F process generation would be superior (and replacing them with SPARC64 " would be *dramatically* superior)?  I Of course, the 4-way per-core SMT might be the deciding factor in server  H throughput even if single-thread performance really was that low, but I , still expect it will be considerably higher.   - bill   ------------------------------  $ Date: Wed, 2 Mar 2005 08:42:25 -0500# From: "John Smith" <a@nonymous.com>4/ Subject: Re: new Itanium after Tukwila: Poulsoni, Message-ID: <N-2dnRc9Lt5fX7jfRVn-qA@igs.net>   icerq4a@spray.se wrote:L > Dave Froble wrote: >> icerq4a@spray.se wrote: >>H >>> I think you are a bit confused here, the Prescott had 64-bit supportG >>> and the design decisions for that CPU must have been settled aroundeE >>> 2000. Intel had decided that 64-bit x86 was parts of it's future,  >>> but they announced it late.o >>F >> I think that ANYONE who doesn't understand that Intel was not goingF >> to enable any 64 bit capability in IA-32 unless they were forced to5 >> is not facing the reality that existed a year ago.c >aH > I find it very hard to believe that Intel made the core of a very highH > volume product almost twice it's size and never use it. Not even Intel> > can do that. I think Intel realized that x86 with 64-bit wasF > inevitable in 1999, especially considering comments about Itanium isG > not a desktop chip. If they had announced or even designed an ItaniumA5 > desktop chip then it would have been another thing.2    L I believe that IA64 *was* intended to be a desktop chip in addition to being" a server chip, at least initially.  ? When the chip was released is was nowhere close to being in theaL price/perfomance point of the curve where any self-respecting OEM would evenL consider it as a desktop possibility. Manufacturers quickly backed away fromI any previous announcements of that bing a possibility, and even MicrosoftnJ saw the writing on the wall and delayed and/or dropped product developmentI plans for IA64 software, thereby making it inevitable that desktop IA64's $ are at least 3-4 years out, if ever. --- OpenVMS - The classics never go out of style.o   ------------------------------  % Date: Wed, 02 Mar 2005 11:41:58 -0500V' From: Dave Froble <davef@tsoft-inc.com>a/ Subject: Re: new Itanium after Tukwila: Poulsonu0 Message-ID: <112bqlv3i1p422a@corp.supernews.com>   icerq4a@spray.se wrote:n  G > What I try to say is that the main reasons for large L3 caches are toe4 > alleviate for a less powerful system architecture.   I must confess to curosity.G  G In the above you're admitting that you think the itanic isn't the best s of designs.O  H Another post claimed that when HP's technical people saw the success of H DEC and IBM with out-of-order designs they advised management that EPIC E should be dropped, and that sticking with it was a management, not a s technical decision.e  / How many applications run pretty much in cache?c  H How many users tweek and optimize the compilation of their applications?  / How many users buy computers to run benchmarks?   @ Itanic is a rather poor design that due to state of the art CPU D manufacturing will allow most people to run their applications with 4 acceptable performance, in spite of the poor design.  C So my question is, just what is it about this CPU design that gets 0! people to advocate and defend it?u   Dave   ------------------------------  % Date: Wed, 02 Mar 2005 11:50:53 -0500t' From: Dave Froble <davef@tsoft-inc.com>w/ Subject: Re: new Itanium after Tukwila: Poulsont0 Message-ID: <112br6nmc9p1t5b@corp.supernews.com>   icerq4a@spray.se wrote:  > Dave Froble wrote: >  >>icerq4a@spray.se wrote:r >> >>? >>>I think you are a bit confused here, the Prescott had 64-bit> > 	 > support3 > F >>>and the design decisions for that CPU must have been settled aroundD >>>2000. Intel had decided that 64-bit x86 was parts of it's future, >  > but- >  >>>they announced it late. >>E >>I think that ANYONE who doesn't understand that Intel was not goingt >  > to > E >>enable any 64 bit capability in IA-32 unless they were forced to iso >  > not  > - >>facing the reality that existed a year ago.t >  > H > I find it very hard to believe that Intel made the core of a very highH > volume product almost twice it's size and never use it. Not even Intel > can do that.   See Bill's response.  < > I think Intel realized that x86 with 64-bit was inevitableI > in 1999, especially considering comments about Itanium is not a desktop>F > chip. If they had announced or even designed an Itanium desktop chip( > then it would have been another thing.  H In 2001 when Compaq killed Alpha, the main reason was that IA-64 WAS to E be an inexpensive product usable from the desktop to the enterprise. lF (Actually, the real reason was that they didn't want to be in the CPU C business.)  It's only in the last year or 2 that HP and Intel have NF backed off their earlier positions and said that IA-64 would not be a  desktop CPU.  C I have to wonder where you've been the last 6 years.  These things cF cannot be reasonable discussed without keeping in mind the history of ; the products and the earlier claims of their manufacturers.u  F >>>As for competition with and without AMD. I really doubt the Pentium >  > ProG > D >>>(P6) designers at Intel were saying that they didn't want to make >  > thee > B >>>fastest possible CPU. In the 90's, they wanted to beat PowerPC, >  > Alpha, >  >>>PA-RISC, MIPS, Sparc. >>D >>But Intel didn't want IA-32 competing with IA-64.  They planned onA >>controlling this situation.  Only outside forces caused them toi >  > enable >  >>EMT64. >  > 4 > I don't know what that has to do with what I said.  C It has everything to do with Intel trying to control what would be . available to users/customers.5   >>>If AMD had not been around,; >>>PowerPC might have had a much larger market share today.m, >>>AMD has helped Intel in the x86 conquest. >>>i >>G >>Software has helped much more than any hardware.  That said, yes, AMDn >  > is , >  >>part of the equation.  >> >>Dave >  >    ------------------------------   Date: 2 Mar 2005 08:55:29 -0800r From: icerq4a@spray.se/ Subject: Re: new Itanium after Tukwila: PoulsonsB Message-ID: <1109782529.104578.22840@f14g2000cwb.googlegroups.com>   Dave Froble wrote: > icerq4a@spray.se wrote:n >lF > > What I try to say is that the main reasons for large L3 caches are to6 > > alleviate for a less powerful system architecture. >a > I must confess to curosity.f >iC > In the above you're admitting that you think the itanic isn't thel best
 > of designs.   < Yes, it's bus/system architecture is not the best out there.D That is pretty obvious and the main reason why for example POWER5 is ahead.  F > Another post claimed that when HP's technical people saw the success ofD > DEC and IBM with out-of-order designs they advised management that EPICF > should be dropped, and that sticking with it was a management, not a > technical decision.t   I have not seen that.8< I guess lots of people have had opinions of EPIC many times.  1 > How many applications run pretty much in cache?    Very difficult to answer.r  < > How many users tweek and optimize the compilation of their
 applications?o  ! It varies very much, hard to say.   1 > How many users buy computers to run benchmarks?-  	 Not many.-  A > Itanic is a rather poor design that due to state of the art CPU@E > manufacturing will allow most people to run their applications with@6 > acceptable performance, in spite of the poor design.  ' I don't think Itanium is a poor design.   D > So my question is, just what is it about this CPU design that gets# > people to advocate and defend it?r  C I don't know, perhaps because it is different, and some people likewD diversity. It is pretty fun to read the IA64 manuals and think about% how things can be done and optimized.   D I advocate a bit because many people portray it as particularly bad,C sometimes for reasons other than technical. That is not what I haveo seen when coding for IA64.  F I have never had any illusions that Itanium would outperform anything.A I think it is doing a very good job for being an in-order design.o   ------------------------------   Date: 2 Mar 2005 09:33:26 -0800f From: icerq4a@spray.se/ Subject: Re: new Itanium after Tukwila: Poulson C Message-ID: <1109784806.194362.246220@g14g2000cwa.googlegroups.com>a   Dave Froble wrote: > icerq4a@spray.se wrote:  > > Dave Froble wrote: > >' > >>icerq4a@spray.se wrote:  > >> > >>A > >>>I think you are a bit confused here, the Prescott had 64-bit  > >a > > supporta > > A > >>>and the design decisions for that CPU must have been settled  aroundF > >>>2000. Intel had decided that 64-bit x86 was parts of it's future, > >  > > butu > >E > >>>they announced it late. > >>G > >>I think that ANYONE who doesn't understand that Intel was not going  > >  > > to > >yG > >>enable any 64 bit capability in IA-32 unless they were forced to is  > >  > > notm > >E/ > >>facing the reality that existed a year ago.N > >r > >"E > > I find it very hard to believe that Intel made the core of a verye highD > > volume product almost twice it's size and never use it. Not even Intele > > can do that. >g > See Bill's response. >S> > > I think Intel realized that x86 with 64-bit was inevitableC > > in 1999, especially considering comments about Itanium is not at desktop C > > chip. If they had announced or even designed an Itanium desktop" chip* > > then it would have been another thing. >eF > In 2001 when Compaq killed Alpha, the main reason was that IA-64 WAS toF > be an inexpensive product usable from the desktop to the enterprise.   Not desktop,+ and you are wrong but you correct it below,o3 the current leaders wanted out of the CPU business..0 The reasons cited at the time are another story.  G > (Actually, the real reason was that they didn't want to be in the CPU    > business.)8   It's only in the last year or 2 that HP and Intel haveG > backed off their earlier positions and said that IA-64 would not be al   > desktop CPU.  D I don't agree with that. It has been pretty obvious since 1998-99 onB Intel roadmaps and presentations. They had workstations planned in( 1999, but the workstation market folded.  D > I have to wonder where you've been the last 6 years.  These thingsG > cannot be reasonable discussed without keeping in mind the history ofn  = > the products and the earlier claims of their manufacturers.k   There were wild claims in 1994,iC later in the 90's several high profile Intel people backed off whenn asked.  @ > >>>As for competition with and without AMD. I really doubt the Pentium  > >n > > Prod > >iF > >>>(P6) designers at Intel were saying that they didn't want to make > >t > > the  > >cD > >>>fastest possible CPU. In the 90's, they wanted to beat PowerPC, > >l
 > > Alpha, > >b > >>>PA-RISC, MIPS, Sparc. > >>F > >>But Intel didn't want IA-32 competing with IA-64.  They planned onC > >>controlling this situation.  Only outside forces caused them tot > > 
 > > enable > > 
 > >>EMT64. > >T > >o6 > > I don't know what that has to do with what I said. >bD > It has everything to do with Intel trying to control what would be > available to users/customers.   G OK, I just commented on the fact that many people say that Intels's x86sG CPUs would not have been as powerful today without AMD. I say the teamsl= working on Intels x86 CPUs had lots of reasons of making high D performance CPUs anyway, especially considering the potential threat8 that the PowerPC alliance was in the middle of the 90's.  C Leaving x86 would open the whole market for other architectures andwE Intel obviously knew that. I listened to an "supposed to know things"t2 analyst I think in 1995 claimed that x86 could notF scale/insert_what_you_want here. This was not an uncommon thought even= from "good" hackers, PowerPC/RISC was really hot for a while.t  @ I asked many people how they could believe that, did they reallyB thought that Intel would leave the whole x86 market and leave thatE market to AMD and, was it National Semiconductor(?) to prosper and ateC the same time open up entries for PowerPC to take market share fromhE x86. I thought the ideas were crazy, AMD was pretty strong during thea later half of 90's.n   ------------------------------  $ Date: Wed, 2 Mar 2005 07:24:27 -0500) From: "Neil Rieck" <n.rieck@sympatico.ca>WA Subject: Re: OpenVMS Seminar in Toronto (2005-02-24) a few pointsw: Message-ID: <2giVd.30631$Vf6.921737@news20.bellglobal.com>  ' <bob@instantwhip.com> wrote in message  < news:1109550872.067891.88350@o13g2000cwo.googlegroups.com...D > Oracle would create a band of very unhappy customers if they tried > to eol rdb >EJ The following interesting Oracle RDB points were mentioned at the seminar:  L 1) 50% of the code currently in RDB was put there since the sale of the RDB  division from Digital to Oracley  I 2) While trying to assure people that they kill off PeopleSoft products,  K Oracle is pointing to their track record with RDB and saying "See, we took o2 over that product 10 years ago and didn't kill it"  J 3) Oracle RDB on Alpha is the fastest "commercially available" relational H database on the planet (a special version of DB2 on R6000, which is not 0 available to customers, wins the TPCC benchmark)    
 Neil Rieck Kitchener/Waterloo/Cambridge,c Ontario, Canada.9 http://www3.sympatico.ca/n.rieck/links/cool_openvms.html t   ------------------------------  % Date: Wed, 02 Mar 2005 08:27:13 -0500e( From: Bill Todd <billtodd@metrocast.net>A Subject: Re: OpenVMS Seminar in Toronto (2005-02-24) a few points = Message-ID: <UqqdnQJCxY6vIrjfRVn-iQ@metrocastcablevision.com>y   Neil Rieck wrote:o   ...e  L > 3) Oracle RDB on Alpha is the fastest "commercially available" relational J > database on the planet (a special version of DB2 on R6000, which is not 2 > available to customers, wins the TPCC benchmark)  
 Say, what?  H The highest TPC-C score hasn't been on anything resembling an R6000 for B a good many years now.  And TPC rules absolutely require that the I software used in submissions be commercially available (at worst, within y% a few months of the submission date).   @ If RDB on Alpha indeed were 'the fastest commercially available G relational database on the planet', even given cHumPaq's distinct lack iH of enthusiasm for that platform one might have expected them to roll it G out when POWER5 clobbered them so resoundingly a few months ago:  they  I did use Alpha to take the lead in the SAP SD 2-tier benchmark for over a  I year while Itanic couldn't cut the mustard (actually, for all we know it eG still can't, at least for HP, though a 32-Itanic NEC system managed to cE beat the January, 2003 32-processor Alpha score of 4500 in February,  G 2004), but used Oracle 9i rather than RDB as the database platform for aF that submission (don't get too excited:  IBM racked up a 32-processor A score of 4128 using 32 POWER4 cores in September, 2002, and thus hG probably could have beaten the Alpha score as soon as POWER4+ came out   had it wished to).  H It's even very questionable whether a 128-processor GS1280 system could G beat last year's 64-core POWER5 TPC-C score of 3.21 million tpmC (well  G over three times the best 64-processor Itanic score).  Now, if EV8 had s been completed...y   - bill   ------------------------------  $ Date: Wed, 2 Mar 2005 08:48:47 -0500# From: "John Smith" <a@nonymous.com>hA Subject: Re: OpenVMS Seminar in Toronto (2005-02-24) a few pointso, Message-ID: <7dqdnQEBgc-iWbjfRVn-iQ@igs.net>   Neil Rieck wrote: ( > <bob@instantwhip.com> wrote in message> > news:1109550872.067891.88350@o13g2000cwo.googlegroups.com...E >> Oracle would create a band of very unhappy customers if they trieda
 >> to eol rdbi >>C > The following interesting Oracle RDB points were mentioned at the 
 > seminar: > E > 1) 50% of the code currently in RDB was put there since the sale ofa) > the RDB division from Digital to Oraclen    H No surprise there.... Code that big always has bugs that need fixing andJ adaptations to changes in the os, and it's it's been 10 years of tinkering1 since Oracle was 'given' Rdb at a firesale price.-    @ > 3) Oracle RDB on Alpha is the fastest "commercially available"G > relational database on the planet (a special version of DB2 on R6000,t? > which is not available to customers, wins the TPCC benchmark)a  L Where's the published benchmark? Without it that statement is about as valid as HP's solemn promise of EV79.    --- OpenVMS - The classics never go out of style.L   ------------------------------  $ Date: Wed, 2 Mar 2005 10:36:40 -0500< From: "Peter Weaver" <WeaverConsultingServices@sympatico.ca>A Subject: Re: OpenVMS Seminar in Toronto (2005-02-24) a few pointsa, Message-ID: <38m4saF5h7unpU1@individual.net>   Neil Rieck wrote:u( > <bob@instantwhip.com> wrote in message> > news:1109550872.067891.88350@o13g2000cwo.googlegroups.com...E >> Oracle would create a band of very unhappy customers if they triedr
 >> to eol rdbR >>C > The following interesting Oracle RDB points were mentioned at theg
 > seminar: > ...   F One other point from Norman's session that I recall is that on a slideE he quoted Larry Ellison as saying that the way Oracle treated the RDBbC customers is a good example of how to treat customers of products atF company buys. So I do not think there would be anyway he would EOL RDBH after making a comment like that. Unfortunately I did not write down the? exact quote since I figured I would get it on the slides later.    -- e Peter Weaver Weaver Consulting Services Inc.  Canadian VAR for CHARON-VAXi www.weaverconsulting.cat   ------------------------------  % Date: Wed, 02 Mar 2005 18:27:49 +0100n0 From: Keith Cayemberg <keith.cayemberg@arcor.de>A Subject: Re: OpenVMS Seminar in Toronto (2005-02-24) a few pointsrB Message-ID: <4225f796$0$24930$9b4e6d93@newsread2.arcor-online.net>   Peter Weaver wrote:o   > Neil Rieck wrote:a > ( >><bob@instantwhip.com> wrote in message> >>news:1109550872.067891.88350@o13g2000cwo.googlegroups.com... >>E >>>Oracle would create a band of very unhappy customers if they tried-
 >>>to eol rdba >>>  >>C >>The following interesting Oracle RDB points were mentioned at the 
 >>seminar: >>.... >  > H > One other point from Norman's session that I recall is that on a slideG > he quoted Larry Ellison as saying that the way Oracle treated the RDB E > customers is a good example of how to treat customers of products auH > company buys. So I do not think there would be anyway he would EOL RDBJ > after making a comment like that. Unfortunately I did not write down theA > exact quote since I figured I would get it on the slides later.n >     6 Oracle Praised By Thousands of Satisfied Rdb Customers2 http://www.oracle.com/corporate/press/2337269.html   Nine Years Later - PDF3 http://www.oracle.com/peoplesoft/Rdb_CaseStudyE.pdfe  $ An Oracle Rdb-centric VMS TUD TidbitA http://www.shannonknowshpc.com/stories.php?story=04/10/10/1936825-  ! Oracle Rdb Statement of Direction0Y http://www.oracle.com/technology/products/rdb/htdocs/rdb7/rdb_statement_of_direction.html1    ? The above shows there is plenty of collateral stating Oracle's  C commitment to Rdb. I would say it is also partly due the continual fB industry-leading innovation of its development team and quick new G feature release cycle despite having 3 development trees (7.0, 7.1 and eD 7.2). The Oracle Classic team has over 90 platforms to contend with F providing (in many aspects) a lowest-common denominator functionality F (Oracle Classic integration of the DLM on OpenVMS is an example where A this has not been the case). But Oracle Classic has a completely eE different DB engine model, and has not yet been able incorporate (or aC make as good use of) many of the features and advantages developed oD originally and often exclusively for Rdb. Some features were mostly H unnoticed by the public for many years before they became buzzwords for  competing products.p  ;      - Snapshot coordination of serialized transaction datap      - Cost-Based Optimization$      - precompiled optimized queries      - optimizer hintsG      - BLOBs (segmented strings) since 1984 (became buzzword c.a. 1990)t      - bit-mapped indices (      - latches (ultra-efficient locking)I      - BLASTs used for efficient SW-interrupt-based resource coordination       - pseudo-ranked indices@      - transaction- and quiet point-aware on line backup utility7      - true fully-shared clustering and DLM integration (      - cluster-aware rollback resolutionE      - true default "serializable read transaction isolation" withouth@        needing an additional TP Monitor front-end, despite and aG        necessary consequence of Rdb's ultra-scalable direct per-processr<        DB access model (compare Oracle Classic's served data        resource bubble model).A      - log-based (AIJ) ultra-low transaction overhead Hot-StandbyT        database capability9      - log-mining (AIJ) transaction replication interface-         and more...R  I Rdb has also always been at the forefront of implementing SQL standards, rE going far beyond the basic "Entry-Level" SQL Standards Compliance of c almost all other SQL products.   Cheers!    K.C.   ------------------------------   Date: 2 Mar 2005 07:38:35 -0600e; From: koehler@eisner.nospam.encompasserve.org (Bob Koehler)s( Subject: Re: Ouch! a *MAJOR* bug in TPU.3 Message-ID: <LPoLxzHmT6br@eisner.encompasserve.org>s  _ In article <42251639.D782A28@comcast.net>, David J Dachtera <djesys.nospam@comcast.net> writes:e > : > ...but, it *MUST* *NOT* appear at "imaginary" locations. >   A    Well, I was goind to say "says who?", but then I realized that C    there's nothing imaginary about the cursor on my screen, even ifs>    it doesn't correspond to an existing location in your file.   ------------------------------   Date: 2 Mar 2005 09:01:05 -0800a3 From: "Big John" <john.powers@airwidesolutions.com>i( Subject: Re: Ouch! a *MAJOR* bug in TPU.C Message-ID: <1109782865.388247.146940@f14g2000cwb.googlegroups.com>r  > This thread evolved beyond its original conception, but it hasC raised some other points that are worth looking at. If for no otheru: reason than to warn newcomers to TPU of possible problems.  ? (Maybe a better idea would have been to start a new thread with,( this, but it's a bit late for that now.)  ? Although I use and like TPU a lot, I am aware that it has a fewaA drawbacks, and one of the more significant ones was pointed to inn this thread.  < Somebody (Paul S, Bart Z, Bob K, or David D - sorry I've got& confused over the attributions) said..  3 >>By the way: TPU can cause inadvertent corruption:  >> >>o Edit any file.A >>o Move the cursor to the end of any line where the next line isd shorter., >>o Cursor down once, and hit the space bar. >>? >>You just corrupted your file. The cursor line is now one bytep longerA >>than the line above it. TPU/EVE has space-padded the line up toi thecD >>cursor position before you added a space, and then added the space you 
 >>just typed.r >s > B > I would not call this corruption. It is documented behaviour and your> > file is certainly not fubar. You can use the EVE command SET CURSOR' > BOUND to prevent this from happening.M  D Well, yes that is not a corruption, but you can get one another way.A I know, as it has happened to me. IMO, the stooopidest thing thateA the EVE writers did was to make FREE cursor the default. Try thise@ for size as an alternative to Paul/Bart/Bob/David's corruption..  5 o Edit the file (with the EVE default of free cursor).7 o Move the cursor past the end of line into empty spacee. o Ask TPU where you are with the command: <do>#    TPU MESSAGE(STR(CURRENT_OFFSET))t  @ - and lo, your buffer has been modified. The line is padded withA spaces. Now this is what I *would* call corruption. This is *not*a@ documented behaviour. If you check through all the help for freeC cursor, message, and current_offset - there is no mention in any oft4 these items that they can cause buffer modification.  A I got round this by writing an eve_offset command, which gets the>? information in a much more defensive way, just in case there iso7 anybody in the world who actually prefers free cursors.   D The best thing I think HP could do to fix this bug would be to add a? large warning in the help that SET CURSOR FREE can add spurious3> spaces in your file, and avoid its use for all purposes exceptA perhaps word processing. (I know some people find it kinda usefulOA for making a table). It's probably too late to change the defaultmC behaviour in the Vanilla eve section to bound cursor, as that wouldd. clash with their aim of backward compatibility  C I am sure many people will think that a bit of a cheat, but since a ? bug is discrepancy between the documented and actual behaviour,sB there are 2 ways to fix a bug - repair the behaviour or change the documentation.  D And option 2 is probably the best we can do here. And remember (with apologies to Hilaire Belloc)..    'Always keep a well bound cursor&  For fear of finding something worser'     Cheers, John   ------------------------------  # Date: Wed, 02 Mar 2005 14:16:37 GMTt6 From: "Kenneth Farmer" <kfarmer@NOSPAM.spyderbyte.com> Subject: Re: Point Secureh> Message-ID: <9VjVd.28950$Yf5.2971547@twister.southeast.rr.com>   Dan,  H Both HP and OpenVMS.org recognize the value of having partners that are H supporting and investing in OpenVMS. PointSecure has great products for M helping enterprises secure their OpenVMS environment. Without company's like  ; them OpenVMS will not be able to compete against the enemy.l  H ...and yes, they are a paid advertiser on OpenVMS.org, which by-the-way F isn't a reseller.  Just one more sign that they support the community.     Ken3   OpenVMS.orge% _____________________________________h Kenneth R. Farmer <><a% SpyderByte: http://www.SpyderByte.como      / "Dan Moore" <dmoore@sosu.edu> wrote in message e% news:EdJTd.21865$bp3.8833@fe03.lga...nL > Anyone using Point Secure's "System Detective"? We are considering it for D > its key stroke logging capability (in case we need to investigate K > unauthorized activity). Many other features are also available that seem aJ > to make it the Swiss army knife for additional OpenVMS Security: Assist E > users interactively, log out idle sessions, log attempts to access nM > unauthorized resources.  Is there another product that offers all of these aD > features in one package? I'm also interested to hear about system 0 > performance impact, which I'm told is minimal. >t >z > J > I liked this synopsis written by Nic Clews   Jun 19 2002 on comp.os.vms: >y" > VMS out of the box is very good. >nD > VMS after some configuration reading the documentation can be made > 'draconian'. >rG > Some companies (e.g. Point Secure) can provide add ons which can make,$ > passing wind a security violation. >l > Your feedback is appreciated,s >t >  >n	 > Thanks,e >> >v >i > Dan Moore  >  >e >e >    ------------------------------   Date: 2 Mar 2005 09:13:22 -0800 - From: pfleging.lka@ekkw.de (pfleging.michael)n/ Subject: Re: Problem with a DEC terminal servers= Message-ID: <b8cd107b.0503020913.19b08bd0@posting.google.com>e  E The DECserver 90L+ will work as a standalone unit with an external 5VyA power supply, DEC number H7082-AA (110 VAC) or H7082-BA (220 VAC)   ? You can also install the DECserver in a DEChub 90 or DEChub 900r  0 Access is then possible via ThinWire (DEChub90),@ via Twisted pair: DECrepeater 90T (unshielded), DECrepeater 90T+ (shielded and unshielded) $ or via fiber-optic: DECrepeater 90FS  B by the way, we have four DEChub90 and one DEChub900 that we do not+ need anymore, but we are located in germanyo    r pfleging.lka@ekkw.de (pfleging.michael) wrote in message news:<b8cd107b.0503010035.4458307c@posting.google.com>...M > If you have VMS, you can reprogram your Terminalserver via Console Connect:s% > example, from documentation of NCP:s > 
 > $ MC NCP > : > NCP>CONNECT VIA UNA-0 PHYSICAL ADDRESS 08-00-2B-22-45-CD > B > replace UNA-0 with your Network device (NCP>SHOW KNOWN CIRCUITS)C > and 08-00-2B-22-45-CD with the MAC Address of your DECserver 90L+o > G > you will get a session (port 9) on your Terminal Server, then you cano> > see and reprogram the port settings according to your manual >  > drwho8__NOTME__@att.net (The Eighth Doctor) wrote in message news:<BZaUd.81854$Th1.81032@bgtnsc04-news.ops.worldnet.att.net>...r > > Hello from Gregg C LevineeO > > I have here a DECserver 90L+. According to the manual which I have here, I tV > > connected a PC to one of its ports, using a temporary plug. Then set the terminal [ > > software to a default of 9600,8,n,1. (Which I suspect isn't the correct settings.) And tY > > then when I turned the T/S on, and pressed enter, twice, instead of getting a prompt sV > > sequence, I got garbage. Does anyone know the correct way to do a "factory reset"  > > for the thing?	 > > -----L# > > Gregg drwho8 atsign att dot nety# > > "This signature isn't at home."k   ------------------------------   Date: 2 Mar 2005 03:47:31 -0800o$ From: juno10000@hotmail.com (Triger)  Subject: sysgen and decw problem= Message-ID: <d969c33c.0503020347.206f13fa@posting.google.com>a  1 System is AlphaServer ds-10l with OpenVms v7.3-1.i? I was trying to start dewcw server now everytime when system iso booting I have message:  ____________________  F %SET-I-INTSET, login interactive limit = 64, current interactive value = 0u3 %DECW$DEVICE-I-NODEVICE, no graphics devices found.nA %DECW-W-BADVALUE, Free GBLSECTIONS is 235, should be at least 280cF Some SYSGEN parameters must be reset for DECwindows to start.   If you typeE YES, AUTOGEN will change these parameters and reboot your system.  Ifc you typeC NO, AUTOGEN will not run or cause a reboot, but DECwindows will nott start.6 Do you want the system to run AUTOGEN for you [YES]? n* %DECW-F-BADPARAMS, DECwindows cannot start8   SYSTEM       job terminated at  2-MAR-2005 12:22:26.16 ________________________  @ If I answer YES system will try to reconfigure sysgen params andD reboot again and after that same thing: same message , if answer yes all over again  2 If answer is no then decw will not start of course  F In MC SYSGEN : WINDOW_SYSTEM param allways resets to o, I tried to set 1 but no success  " There is no graphic card on system   Anyone can help here, please??	 Thank you    ------------------------------   Date: 2 Mar 2005 06:11:22 -0800i From: martinkirby12@yahoo.co.uko$ Subject: Re: sysgen and decw problemB Message-ID: <1109772682.233003.97210@l41g2000cwc.googlegroups.com>  = It is a known issue with DECwindows, fixed in later releases.a  G Problem is that DECwindows calculates an increment for GBLSECTIONS thathF is incorrect. You can add your own ADD_GBLSECTIONS to MODPARAMS.DAT or> you can disable the DECwindows Autogen check using a define of DECW$IGNORE_AUTOGEN.   Martin Kirby   ------------------------------  * Date: Wed, 2 Mar 2005 18:36:20 +0000 (UTC)6 From: peter@langstoeger.at (Peter 'EPLAN' LANGSTOEGER)$ Subject: Re: sysgen and decw problem1 Message-ID: <newscache$jcmqci$q242$1@news.sil.at>s  d In article <1109772682.233003.97210@l41g2000cwc.googlegroups.com>, martinkirby12@yahoo.co.uk writes:> >It is a known issue with DECwindows, fixed in later releases.  G Yup, it seems fixed now. But it took some (not to say many) versions...r  H >Problem is that DECwindows calculates an increment for GBLSECTIONS thatG >is incorrect. You can add your own ADD_GBLSECTIONS to MODPARAMS.DAT or ? >you can disable the DECwindows Autogen check using a define ofe >DECW$IGNORE_AUTOGEN.   M I prefer MIN_* (in my case MIN_GBLSECTIONS=1024 just for DECW) way over ADD_*   K And don't forget to add this line to SYS$MANAGER:AGEN$NEW_NODE_DEFAULTS.DATt5 and SYS$MANAGER:AGEN$NEW_SATELLITE_DEFAULTS.DAT also.t   -- a Peter "EPLAN" LANGSTOEGERa% Network and OpenVMS system specialist' E-mail  peter@langstoeger.atF A-1030 VIENNA  AUSTRIA              I'm not a pessimist, I'm a realist   ------------------------------  # Date: Wed, 02 Mar 2005 11:44:10 GMT2" From: "Binh Nguyen" <binh@egh.com>  Subject: Re: vms mail forwarding+ Message-ID: <eGhVd.72880$uc.72611@trnddc04>   J Sorry, all this is new to me.  I'll look into Majordomo and DELIVER today,# but if you could, please elaborate.t  D Alternatively, is there a way for me to send a message from my PC to7 chef@chocolate.com and have the mail get to vms::chef ?xB My work setup is: mail from my PC to my VMS machine to my client's VMS machine.  
 Thanks.  Binh   [ "Hoff Hoffman" <hoff@hp.nospam> wrote in message news:QY3Vd.795$Q14.731@news.cpqcorp.net...gR > In article <1%2Vd.48410$uc.23144@trnddc08>, "Binh Nguyen" <binh@egh.com> writes:; > :Is there a way I can send mail to a vms mail account and-A > :have that account forward the message to a distribution list ?t >< >   Not directly.u >cK >   You can use a mail server or other such technology, of course, and thisqJ >   is definitely the approach I would use -- Majordomo or such allows for7 >   easy management of mail and subscriptions and such., >eM >   As for the OpenVMS MAIL client, there has been an attempt made to preventvL >   forwarding mail to a distribution list because there is no way to handleK >   the expected partial failures of such an operation.   There can be onlyEG >   one target for a MAIL forward, and it can't be a distribution list.  >aK >   This has been discussed before, of course -- more than a few folks have K >   wanted to try this, and the classic Mail-11 protocol just doesn't alloweJ >   for it to work correctly.  There is no "correct" implementation choice4 >   here, obviously, given the Mail-11 restrictions. > = >   The Freeware DELIVER package is another potential option.i >iP >  ---------------------------- #include <rtfaq.h> -----------------------------M >     For additional, please see the OpenVMS FAQ -- www.hp.com/go/openvms/faq P >  --------------------------- pure personal opinion ---------------------------G >         Hoff (Stephen) Hoffman   OpenVMS Engineering   hoff[at]hp.comh >    ------------------------------  # Date: Wed, 02 Mar 2005 11:39:03 GMTf" From: "Binh Nguyen" <binh@egh.com>  Subject: Re: vms mail forwarding+ Message-ID: <rBhVd.72874$uc.61539@trnddc04>o  ? I'm sorry TCPIP$SMTP_COMMON is not defined on my system.  Wherea should it be ?  B Alternatively if I could, I'd like to send mail from my PC to VMS,? i.e. send mail to chefs@chocolate.com and have this mail get tor VMS::chefs.4   Binh    w "JF Mezei" <jfmezei.spamnot@teksavvy.com> wrote in message news:1109704395.6b1ceac9b1bbffd998689ff45b1303dd@teranews...1 > Binh Nguyen wrote: > >F > > Hi,v< > > Is there a way I can send mail to a vms mail account andB > > have that account forward the message to a distribution list ? >aJ > With TCPIP services, you can drop a distribution list file (.dis) in theM > TCPIP$SMTP_DOMMON: directory and the name of the file because the username.n >sG > eg:  TCPIP$SMTP_COMMON:chefs.dis  makes "chefs@chocolate.com" a valid F > email destination and any message sent to it gets distributed to all > recipients inside. >c5 > So you could also have MAIL> set forward/user=chefsvH > smtp%chefs@chocolate.com and this woudl allow yo from VMS mail to sendJ > to "chefs" instead of chefs@chocolate.com  (however, i am not sure about! > possible infinite loops there).u   ------------------------------   Date: 2 Mar 2005 07:20:24 -0600  From: briggs@encompasserve.org( Subject: Re: VMS mail nla0: as mailbox ?3 Message-ID: <J0d0qPkJbKRV@eisner.encompasserve.org>   r In article <1109704589.91a5a5acc77c02d89372720e9c6ed7c3@teranews>, JF Mezei <jfmezei.spamnot@teksavvy.com> writes:@ > Is it possible to define the VMS bit bucket NLA0: as a mailbox > destination for a username ?  + No.  NLA0: is not a file structured device.a   	John Briggs   ------------------------------  % Date: Wed, 02 Mar 2005 11:00:05 +0000:- From: Roy Omond <Roy.Omond@BlueBubble.UK.Com>DE Subject: Re: What is the Difference between Shadow and Mirrored disk?a, Message-ID: <38lkqfF5os0vvU1@individual.net>   Nigel Barker wrote:y  O > On Mon, 28 Feb 2005 18:04:28 -0600, Chris Scheers <chris@applied-synergy.com>e > wrote: >iI >>AFAIK, DRAn: (KZPSx) drives are local drives visible to only one node, t; >>so they can't be used as quorum drives anyways, can they?t > N > You can use local disks as quorum. It's not ideal but if e.g. you have a twoR > node LAVC making one of the local disks a quorum disk at least gives you a 50:509 > chance of the cluster staying up if one node goes down.   F Sorry to harp on about this, but since it's coming from an HP address,D I'd just like to add the comment that using a *local* quorum disk as? suggested is not only unnecessary, but actually *increases* thes" probability of losing the cluster.  , Node A (1 vote) + local quorum disk (1 vote) Node B (1 vote)r   Node B goes down ...  A Now you have introduced an unnecessary probability of the clusteraG being lost, equal to the probability of the quorum disk "disappearing".0   Not a Good Idea (TM).a   ------------------------------  # Date: Wed, 02 Mar 2005 16:29:46 GMTe! From: Nigel Barker <nigel@hp.com>.E Subject: Re: What is the Difference between Shadow and Mirrored disk?P8 Message-ID: <ahob21dc155be7hppmfvvtgje15mi13n87@4ax.com>  K On Wed, 02 Mar 2005 11:00:05 +0000, Roy Omond <Roy.Omond@BlueBubble.UK.Com>t wrote:   >Nigel Barker wrote: >oP >> On Mon, 28 Feb 2005 18:04:28 -0600, Chris Scheers <chris@applied-synergy.com>	 >> wrote:o >>J >>>AFAIK, DRAn: (KZPSx) drives are local drives visible to only one node, < >>>so they can't be used as quorum drives anyways, can they? >>O >> You can use local disks as quorum. It's not ideal but if e.g. you have a twotS >> node LAVC making one of the local disks a quorum disk at least gives you a 50:50h: >> chance of the cluster staying up if one node goes down. > G >Sorry to harp on about this, but since it's coming from an HP address,n  N Oh dear I knew that I should leave Keith Parris to answer cluster questions:-)  E >I'd just like to add the comment that using a *local* quorum disk ast@ >suggested is not only unnecessary, but actually *increases* the# >probability of losing the cluster.s >e- >Node A (1 vote) + local quorum disk (1 vote)r >Node B (1 vote) >u >Node B goes down ...t >yB >Now you have introduced an unnecessary probability of the clusterH >being lost, equal to the probability of the quorum disk "disappearing". >  >Not a Good Idea (TM).  5 Agreed but I have seen it done that way by customers.-   ------------------------------  % Date: Wed, 02 Mar 2005 09:35:08 -0600n2 From: "-Andy-" <see2go4me@spamdelicious.yahoo.com>- Subject: Re: What text format and VMS tools ?o6 Message-ID: <Xns960D6BAED613Esee2go4me@216.196.97.131>  8 JF Mezei <jfmezei.spamnot@teksavvy.com> enlightened us   with:   ) > http://www.mit.edu/afs/sipb/system/i386y( _linux2/srvd/usr/athena/man/man3/Uil.3X  > ( > has some non-wisywig document such as:   [snip]  8 > Can anyone tell me what language this is written in ?   - They are unformatted Linux man page sources.    8 For a history lesson and more than you probably want to * know about the format and its' origin see:       	http://www.troff.org/  5 (Or find a Linux or Unix variant system that has the r roff man page.)a   -Andy-   --  4 You can get anything you want, at Alice's Restaurant -- Excepting Alice   ------------------------------    Date: 02 Mar 2005 08:44:20 -0800( From: Javier Henderson <javier@KJSL.COM>= Subject: Re: [OT]: Microsoft tries to patent a BASIC operator - Message-ID: <86ekeyvvyz.fsf@skylane.kjsl.com>s  7 "greigaln@netscape.net" <greigaln@netscape.net> writes:o  I > Paul Allen still runs a public access DEC TOPS-20 system (maybe TOPS-10u@ > as well) on the net and freely admits DEC's influence on early > Microsoft code.   & Where does one find more info on this?   -jav   ------------------------------  $ Date: Wed, 2 Mar 2005 12:23:41 -0500# From: "John Smith" <a@nonymous.com>n= Subject: Re: [OT]: Microsoft tries to patent a BASIC operatora, Message-ID: <16WdnfC5r4EDa7jfRVn-qw@igs.net>   Javier Henderson wrote: 9 > "greigaln@netscape.net" <greigaln@netscape.net> writes:e >kB >> Paul Allen still runs a public access DEC TOPS-20 system (maybeC >> TOPS-10 as well) on the net and freely admits DEC's influence onu >> early Microsoft code. >p( > Where does one find more info on this?     google:n    "Bill Gates" DEC influence basic "Bill Gates" DEC influence pdp     --  - OpenVMS - The classics never go out of style.y   ------------------------------   Date: 2 Mar 2005 09:32:59 -0800i* From: "Alan Greig" <greigaln@netscape.net>= Subject: Re: [OT]: Microsoft tries to patent a BASIC operator:C Message-ID: <1109784779.207760.233360@l41g2000cwc.googlegroups.com>3  > alt.sys.pdp10 is the newsgroup for all DEC-10/DEC-20 info AlsoC http://www.inwap.com/pdp10/ is a good web index..Below is a copy ofpF Paul Allen's original message.  The machine is still operational but ID don't think he gives out accounts because of the wide availablity of@ Windows and Linux emulators for the PDP-10. You can happily bootD TOPS-10 or TOPS-20 on your home PC these days. Note his reference at> the end to Bill Gates and himself using these systems to beginF Microsoft. Apolgies if formating screwed up as forwarding this through Google.   , From: xkladmin@paulallen.com (XKLeTen Admin)A Newsgroups: alt.sys.pdp8,alt.sys.pdp10,alt.sys.pdp11,comp.sys.decy& Subject: XKL (PDP10) Site Announcement# Date: Tue, 30 Dec 1997 02:55:47 GMTa Organization: XKLeTenf1 Message-ID: <34a85fd3.3481181@nntp.ix.netcom.com>s  Reply-To: xkladmin@paulallen.com   Dear Fellow PDP-10 Enthusiast,  E Over the past 25 years, it's been challenging for all of us to find aa place toG run our PDP-10 software.  At the same time, there hasn't been a library  ofE PDP-10 software that is well taken care of, and made easily availableo to the interested public.  F I would like to offer a solution.  I have invested in a TOAD-1 machine runninga@ the PDP-10 architecture, and would like to make its capabilities
 available.E The TOAD is manufactured by XKL LLC, and is a completely new hardwarelG implementation of Digital's 36-bit PDP-10 architecture, not an emulatoriC running on another platform.  This machine I've purchased will be as
 repositoryA for PDP10 public domain software, including the collection of thes
 DEC-10 and DEC-20 DECUS tapes.e  C By making access accounts available to an initial limited group, we  hope toeF learn of any issue areas with our new program.  Through an account you can setnE up with us, you can access this library, and run programs you may not9 haveG seen for years.  You may also submit your own programs for storage, andt forsB use by fellow advocates.  These programs may be submitted via FTP, email orE 9-track tapes.  Once you have an account established you could accessm XKLeTeneB via telnet.  Anyone may download the libraries of software through	 anonymouse FTP from XKLeTen.paulallen.com.s  5 The machine, named XKLeTen, is configured as follows:e  	TOAD-1, 36-bit computing system 	TOPS-20 system software 	32 MW memory board  	4 mm DDS tape drive 	9 track tape drive   	8 gigabyte disk>  D I encourage any of you who are interested to contact us to set up an< account.  To be considered for an account, please submit the0 following information to XKLadmin@paulallen.com:
 	Full name 	Email address4 	Interest or purpose in this project (short summary) 	Desired account name   > If you have any questions about XKLeTen, or how to execute the< anonymous FTP, please contact us via the same email address.  A Bill Gates and I used PDP10s to develop much of Microsoft's earlyuD software.  I hope many of you take advantage of this new opportunity( to keep alive some of your old memories.    
 Paul G. Allen   E ---------------------------------------------------------------------e  E Update: No new accounts have been created on that machine since 1998.t   ------------------------------   End of INFO-VAX 2005.122 ************************