// NSN Version: Jun_25_2014_153945
//************************************************************
// AD9361 R2 Auto Generated Initialization Script:  This script was
// generated using the AD9361 Customer software Version 2.1.4
//************************************************************
// Profile: Custom
// REFCLK_IN: 38.400 MHz

RESET_FPGA	
RESET_DUT	

BlockWrite	2,6	// Set ADI FPGA SPI to 20Mhz
SPIWrite	3DF,01	// Required for proper operation
ReadPartNumber
SPIWrite	2A6,0E	// Enable Master Bias
SPIWrite	2A8,0E	// Set Bandgap Trim
REFCLK_Scale	38.400000,1,2	// Sets local variables in script engine, user can ignore
SPIWrite	2AB,07	// Set RF PLL reflclk scale to REFCLK * 2
SPIWrite	2AC,FF	// Set RF PLL reflclk scale to REFCLK * 2
SPIWrite	009,17	// Enable Clocks
WAIT	20	// waits 20 ms

//************************************************************
// Set BBPLL Frequency: 983.040000
//************************************************************
SPIWrite	045,00	// Set BBPLL reflclk scale to REFCLK /1
SPIWrite	046,04	// Set BBPLL Loop Filter Charge Pump current
SPIWrite	048,E8	// Set BBPLL Loop Filter C1, R1
SPIWrite	049,5B	// Set BBPLL Loop Filter R2, C2, C1
SPIWrite	04A,35	// Set BBPLL Loop Filter C3,R2
SPIWrite	04B,E0	// Allow calibration to occur and set cal count to 1024 for max accuracy
SPIWrite	04E,10	// Set calibration clock to REFCLK/4 for more accuracy
SPIWrite	043,00	// BBPLL Freq Word (Fractional[7:0])
SPIWrite	042,20	// BBPLL Freq Word (Fractional[15:8])
SPIWrite	041,13	// BBPLL Freq Word (Fractional[23:16])
SPIWrite	044,19	// BBPLL Freq Word (Integer[7:0])
SPIWrite	03F,05	// Start BBPLL Calibration
SPIWrite	03F,01	// Clear BBPLL start calibration bit
SPIWrite	04C,86	// Increase BBPLL KV and phase margin
SPIWrite	04D,01	// Increase BBPLL KV and phase margin
SPIWrite	04D,05	// Increase BBPLL KV and phase margin
WAIT_CALDONE	BBPLL,2000	// Wait for BBPLL to lock, Timeout 2sec, Max BBPLL VCO Cal Time: 360.000 us (Done when 0x05E[7]==1)

SPIRead	05E	// Check BBPLL locked status  (0x05E[7]==1 is locked)

SPIWrite	002,CD	// Setup Tx Digital Filters/ Channels
SPIWrite	003,DD	// Setup Rx Digital Filters/ Channels
SPIWrite	004,30	// Select Rx input pin(A,B,C)/ Tx out pin (A,B)
SPIWrite	00A,09	// Set BBPLL post divide rate

//************************************************************
// Program Tx FIR:
// D:\Projects\Argon\Argon_projects\FZM_2x20_19p8_tx_v2.ftr
//************************************************************
SPIWrite	065,7A	// Enable clock to Tx FIR Filter and set Filter gain Setting 
SPIWrite	060,00	// Write FIR coefficient address
SPIWrite	061,34	// Write FIR coefficient data[7:0]
SPIWrite	062,02	// Write FIR coefficient data[15:8]
SPIWrite	065,7E	// Set Write EN to push data into FIR filter register map
SPIWrite	064,00	// Write to Read only register to delay ~1us
SPIWrite	064,00	// Write to Read only register to delay ~1us
SPIWrite	060,01
SPIWrite	061,01
SPIWrite	062,FE
SPIWrite	065,7E
SPIWrite	064,00
SPIWrite	064,00
SPIWrite	060,02
SPIWrite	061,A9
SPIWrite	062,FF
SPIWrite	065,7E
SPIWrite	064,00
SPIWrite	064,00
SPIWrite	060,03
SPIWrite	061,DC
SPIWrite	062,04
SPIWrite	065,7E
SPIWrite	064,00
SPIWrite	064,00
SPIWrite	060,04
SPIWrite	061,46
SPIWrite	062,F7
SPIWrite	065,7E
SPIWrite	064,00
SPIWrite	064,00
SPIWrite	060,05
SPIWrite	061,CE
SPIWrite	062,08
SPIWrite	065,7E
SPIWrite	064,00
SPIWrite	064,00
SPIWrite	060,06
SPIWrite	061,55
SPIWrite	062,FB
SPIWrite	065,7E
SPIWrite	064,00
SPIWrite	064,00
SPIWrite	060,07
SPIWrite	061,84
SPIWrite	062,FF
SPIWrite	065,7E
SPIWrite	064,00
SPIWrite	064,00
SPIWrite	060,08
SPIWrite	061,8E
SPIWrite	062,02
SPIWrite	065,7E
SPIWrite	064,00
SPIWrite	064,00
SPIWrite	060,09
SPIWrite	061,89
SPIWrite	062,FF
SPIWrite	065,7E
SPIWrite	064,00
SPIWrite	064,00
SPIWrite	060,0A
SPIWrite	061,42
SPIWrite	062,FD
SPIWrite	065,7E
SPIWrite	064,00
SPIWrite	064,00
SPIWrite	060,0B
SPIWrite	061,1B
SPIWrite	062,03
SPIWrite	065,7E
SPIWrite	064,00
SPIWrite	064,00
SPIWrite	060,0C
SPIWrite	061,FA
SPIWrite	062,FF
SPIWrite	065,7E
SPIWrite	064,00
SPIWrite	064,00
SPIWrite	060,0D
SPIWrite	061,F8
SPIWrite	062,FC
SPIWrite	065,7E
SPIWrite	064,00
SPIWrite	064,00
SPIWrite	060,0E
SPIWrite	061,6B
SPIWrite	062,02
SPIWrite	065,7E
SPIWrite	064,00
SPIWrite	064,00
SPIWrite	060,0F
SPIWrite	061,58
SPIWrite	062,01
SPIWrite	065,7E
SPIWrite	064,00
SPIWrite	064,00
SPIWrite	060,10
SPIWrite	061,27
SPIWrite	062,FC
SPIWrite	065,7E
SPIWrite	064,00
SPIWrite	064,00
SPIWrite	060,11
SPIWrite	061,CC
SPIWrite	062,01
SPIWrite	065,7E
SPIWrite	064,00
SPIWrite	064,00
SPIWrite	060,12
SPIWrite	061,D4
SPIWrite	062,02
SPIWrite	065,7E
SPIWrite	064,00
SPIWrite	064,00
SPIWrite	060,13
SPIWrite	061,78
SPIWrite	062,FB
SPIWrite	065,7E
SPIWrite	064,00
SPIWrite	064,00
SPIWrite	060,14
SPIWrite	061,A5
SPIWrite	062,00
SPIWrite	065,7E
SPIWrite	064,00
SPIWrite	064,00
SPIWrite	060,15
SPIWrite	061,DB
SPIWrite	062,04
SPIWrite	065,7E
SPIWrite	064,00
SPIWrite	064,00
SPIWrite	060,16
SPIWrite	061,DB
SPIWrite	062,FA
SPIWrite	065,7E
SPIWrite	064,00
SPIWrite	064,00
SPIWrite	060,17
SPIWrite	061,9D
SPIWrite	062,FE
SPIWrite	065,7E
SPIWrite	064,00
SPIWrite	064,00
SPIWrite	060,18
SPIWrite	061,E8
SPIWrite	062,07
SPIWrite	065,7E
SPIWrite	064,00
SPIWrite	064,00
SPIWrite	060,19
SPIWrite	061,62
SPIWrite	062,FA
SPIWrite	065,7E
SPIWrite	064,00
SPIWrite	064,00
SPIWrite	060,1A
SPIWrite	061,60
SPIWrite	062,FA
SPIWrite	065,7E
SPIWrite	064,00
SPIWrite	064,00
SPIWrite	060,1B
SPIWrite	061,27
SPIWrite	062,0E
SPIWrite	065,7E
SPIWrite	064,00
SPIWrite	064,00
SPIWrite	060,1C
SPIWrite	061,13
SPIWrite	062,FA
SPIWrite	065,7E
SPIWrite	064,00
SPIWrite	064,00
SPIWrite	060,1D
SPIWrite	061,E1
SPIWrite	062,EA
SPIWrite	065,7E
SPIWrite	064,00
SPIWrite	064,00
SPIWrite	060,1E
SPIWrite	061,14
SPIWrite	062,34
SPIWrite	065,7E
SPIWrite	064,00
SPIWrite	064,00
SPIWrite	060,1F
SPIWrite	061,4F
SPIWrite	062,71
SPIWrite	065,7E
SPIWrite	064,00
SPIWrite	064,00
SPIWrite	060,20
SPIWrite	061,14
SPIWrite	062,34
SPIWrite	065,7E
SPIWrite	064,00
SPIWrite	064,00
SPIWrite	060,21
SPIWrite	061,E1
SPIWrite	062,EA
SPIWrite	065,7E
SPIWrite	064,00
SPIWrite	064,00
SPIWrite	060,22
SPIWrite	061,13
SPIWrite	062,FA
SPIWrite	065,7E
SPIWrite	064,00
SPIWrite	064,00
SPIWrite	060,23
SPIWrite	061,27
SPIWrite	062,0E
SPIWrite	065,7E
SPIWrite	064,00
SPIWrite	064,00
SPIWrite	060,24
SPIWrite	061,60
SPIWrite	062,FA
SPIWrite	065,7E
SPIWrite	064,00
SPIWrite	064,00
SPIWrite	060,25
SPIWrite	061,62
SPIWrite	062,FA
SPIWrite	065,7E
SPIWrite	064,00
SPIWrite	064,00
SPIWrite	060,26
SPIWrite	061,E8
SPIWrite	062,07
SPIWrite	065,7E
SPIWrite	064,00
SPIWrite	064,00
SPIWrite	060,27
SPIWrite	061,9D
SPIWrite	062,FE
SPIWrite	065,7E
SPIWrite	064,00
SPIWrite	064,00
SPIWrite	060,28
SPIWrite	061,DB
SPIWrite	062,FA
SPIWrite	065,7E
SPIWrite	064,00
SPIWrite	064,00
SPIWrite	060,29
SPIWrite	061,DB
SPIWrite	062,04
SPIWrite	065,7E
SPIWrite	064,00
SPIWrite	064,00
SPIWrite	060,2A
SPIWrite	061,A5
SPIWrite	062,00
SPIWrite	065,7E
SPIWrite	064,00
SPIWrite	064,00
SPIWrite	060,2B
SPIWrite	061,78
SPIWrite	062,FB
SPIWrite	065,7E
SPIWrite	064,00
SPIWrite	064,00
SPIWrite	060,2C
SPIWrite	061,D4
SPIWrite	062,02
SPIWrite	065,7E
SPIWrite	064,00
SPIWrite	064,00
SPIWrite	060,2D
SPIWrite	061,CC
SPIWrite	062,01
SPIWrite	065,7E
SPIWrite	064,00
SPIWrite	064,00
SPIWrite	060,2E
SPIWrite	061,27
SPIWrite	062,FC
SPIWrite	065,7E
SPIWrite	064,00
SPIWrite	064,00
SPIWrite	060,2F
SPIWrite	061,58
SPIWrite	062,01
SPIWrite	065,7E
SPIWrite	064,00
SPIWrite	064,00
SPIWrite	060,30
SPIWrite	061,6B
SPIWrite	062,02
SPIWrite	065,7E
SPIWrite	064,00
SPIWrite	064,00
SPIWrite	060,31
SPIWrite	061,F8
SPIWrite	062,FC
SPIWrite	065,7E
SPIWrite	064,00
SPIWrite	064,00
SPIWrite	060,32
SPIWrite	061,FA
SPIWrite	062,FF
SPIWrite	065,7E
SPIWrite	064,00
SPIWrite	064,00
SPIWrite	060,33
SPIWrite	061,1B
SPIWrite	062,03
SPIWrite	065,7E
SPIWrite	064,00
SPIWrite	064,00
SPIWrite	060,34
SPIWrite	061,42
SPIWrite	062,FD
SPIWrite	065,7E
SPIWrite	064,00
SPIWrite	064,00
SPIWrite	060,35
SPIWrite	061,89
SPIWrite	062,FF
SPIWrite	065,7E
SPIWrite	064,00
SPIWrite	064,00
SPIWrite	060,36
SPIWrite	061,8E
SPIWrite	062,02
SPIWrite	065,7E
SPIWrite	064,00
SPIWrite	064,00
SPIWrite	060,37
SPIWrite	061,84
SPIWrite	062,FF
SPIWrite	065,7E
SPIWrite	064,00
SPIWrite	064,00
SPIWrite	060,38
SPIWrite	061,55
SPIWrite	062,FB
SPIWrite	065,7E
SPIWrite	064,00
SPIWrite	064,00
SPIWrite	060,39
SPIWrite	061,CE
SPIWrite	062,08
SPIWrite	065,7E
SPIWrite	064,00
SPIWrite	064,00
SPIWrite	060,3A
SPIWrite	061,46
SPIWrite	062,F7
SPIWrite	065,7E
SPIWrite	064,00
SPIWrite	064,00
SPIWrite	060,3B
SPIWrite	061,DC
SPIWrite	062,04
SPIWrite	065,7E
SPIWrite	064,00
SPIWrite	064,00
SPIWrite	060,3C
SPIWrite	061,A9
SPIWrite	062,FF
SPIWrite	065,7E
SPIWrite	064,00
SPIWrite	064,00
SPIWrite	060,3D
SPIWrite	061,01
SPIWrite	062,FE
SPIWrite	065,7E
SPIWrite	064,00
SPIWrite	064,00
SPIWrite	060,3E
SPIWrite	061,34
SPIWrite	062,02
SPIWrite	065,7E
SPIWrite	064,00
SPIWrite	064,00
SPIWrite	060,3F
SPIWrite	061,00
SPIWrite	062,00
SPIWrite	065,7E
SPIWrite	064,00
SPIWrite	064,00
SPIWrite	065,78	// Disable clock to Tx Filter

//************************************************************
// Program Rx FIR:
// D:\Projects\Argon\Argon_projects\FZM_2x20_19p8_rx_18p9_19p9.ftr
//************************************************************
SPIWrite	0F5,7A	// Enable clock to Rx FIR Filter 
SPIWrite	0F6,01	// Write Filter Gain setting
SPIWrite	0F0,00	// Write FIR coefficient address
SPIWrite	0F1,8D	// Write FIR coefficient data[7:0]
SPIWrite	0F2,FE	// Write FIR coefficient data[15:8]
SPIWrite	0F5,7E	// Set Write EN to push data into FIR filter register map
SPIWrite	0F4,00	// Dummy Write to Read only register to delay ~1us
SPIWrite	0F4,00	// Dummy Write to Read only register to delay ~1us
SPIWrite	0F0,01
SPIWrite	0F1,90
SPIWrite	0F2,FC
SPIWrite	0F5,7E
SPIWrite	0F4,00
SPIWrite	0F4,00
SPIWrite	0F0,02
SPIWrite	0F1,D9
SPIWrite	0F2,01
SPIWrite	0F5,7E
SPIWrite	0F4,00
SPIWrite	0F4,00
SPIWrite	0F0,03
SPIWrite	0F1,A5
SPIWrite	0F2,FF
SPIWrite	0F5,7E
SPIWrite	0F4,00
SPIWrite	0F4,00
SPIWrite	0F0,04
SPIWrite	0F1,2A
SPIWrite	0F2,FF
SPIWrite	0F5,7E
SPIWrite	0F4,00
SPIWrite	0F4,00
SPIWrite	0F0,05
SPIWrite	0F1,C9
SPIWrite	0F2,00
SPIWrite	0F5,7E
SPIWrite	0F4,00
SPIWrite	0F4,00
SPIWrite	0F0,06
SPIWrite	0F1,65
SPIWrite	0F2,00
SPIWrite	0F5,7E
SPIWrite	0F4,00
SPIWrite	0F4,00
SPIWrite	0F0,07
SPIWrite	0F1,BA
SPIWrite	0F2,FE
SPIWrite	0F5,7E
SPIWrite	0F4,00
SPIWrite	0F4,00
SPIWrite	0F0,08
SPIWrite	0F1,A7
SPIWrite	0F2,00
SPIWrite	0F5,7E
SPIWrite	0F4,00
SPIWrite	0F4,00
SPIWrite	0F0,09
SPIWrite	0F1,E1
SPIWrite	0F2,00
SPIWrite	0F5,7E
SPIWrite	0F4,00
SPIWrite	0F4,00
SPIWrite	0F0,0A
SPIWrite	0F1,81
SPIWrite	0F2,FE
SPIWrite	0F5,7E
SPIWrite	0F4,00
SPIWrite	0F4,00
SPIWrite	0F0,0B
SPIWrite	0F1,47
SPIWrite	0F2,00
SPIWrite	0F5,7E
SPIWrite	0F4,00
SPIWrite	0F4,00
SPIWrite	0F0,0C
SPIWrite	0F1,79
SPIWrite	0F2,01
SPIWrite	0F5,7E
SPIWrite	0F4,00
SPIWrite	0F4,00
SPIWrite	0F0,0D
SPIWrite	0F1,6A
SPIWrite	0F2,FE
SPIWrite	0F5,7E
SPIWrite	0F4,00
SPIWrite	0F4,00
SPIWrite	0F0,0E
SPIWrite	0F1,AD
SPIWrite	0F2,FF
SPIWrite	0F5,7E
SPIWrite	0F4,00
SPIWrite	0F4,00
SPIWrite	0F0,0F
SPIWrite	0F1,1F
SPIWrite	0F2,02
SPIWrite	0F5,7E
SPIWrite	0F4,00
SPIWrite	0F4,00
SPIWrite	0F0,10
SPIWrite	0F1,8B
SPIWrite	0F2,FE
SPIWrite	0F5,7E
SPIWrite	0F4,00
SPIWrite	0F4,00
SPIWrite	0F0,11
SPIWrite	0F1,CA
SPIWrite	0F2,FE
SPIWrite	0F5,7E
SPIWrite	0F4,00
SPIWrite	0F4,00
SPIWrite	0F0,12
SPIWrite	0F1,C6
SPIWrite	0F2,02
SPIWrite	0F5,7E
SPIWrite	0F4,00
SPIWrite	0F4,00
SPIWrite	0F0,13
SPIWrite	0F1,01
SPIWrite	0F2,FF
SPIWrite	0F5,7E
SPIWrite	0F4,00
SPIWrite	0F4,00
SPIWrite	0F0,14
SPIWrite	0F1,8C
SPIWrite	0F2,FD
SPIWrite	0F5,7E
SPIWrite	0F4,00
SPIWrite	0F4,00
SPIWrite	0F0,15
SPIWrite	0F1,64
SPIWrite	0F2,03
SPIWrite	0F5,7E
SPIWrite	0F4,00
SPIWrite	0F4,00
SPIWrite	0F0,16
SPIWrite	0F1,FE
SPIWrite	0F2,FF
SPIWrite	0F5,7E
SPIWrite	0F4,00
SPIWrite	0F4,00
SPIWrite	0F0,17
SPIWrite	0F1,C1
SPIWrite	0F2,FB
SPIWrite	0F5,7E
SPIWrite	0F4,00
SPIWrite	0F4,00
SPIWrite	0F0,18
SPIWrite	0F1,E8
SPIWrite	0F2,03
SPIWrite	0F5,7E
SPIWrite	0F4,00
SPIWrite	0F4,00
SPIWrite	0F0,19
SPIWrite	0F1,FD
SPIWrite	0F2,01
SPIWrite	0F5,7E
SPIWrite	0F4,00
SPIWrite	0F4,00
SPIWrite	0F0,1A
SPIWrite	0F1,B8
SPIWrite	0F2,F8
SPIWrite	0F5,7E
SPIWrite	0F4,00
SPIWrite	0F4,00
SPIWrite	0F0,1B
SPIWrite	0F1,47
SPIWrite	0F2,04
SPIWrite	0F5,7E
SPIWrite	0F4,00
SPIWrite	0F4,00
SPIWrite	0F0,1C
SPIWrite	0F1,1B
SPIWrite	0F2,07
SPIWrite	0F5,7E
SPIWrite	0F4,00
SPIWrite	0F4,00
SPIWrite	0F0,1D
SPIWrite	0F1,40
SPIWrite	0F2,F0
SPIWrite	0F5,7E
SPIWrite	0F4,00
SPIWrite	0F4,00
SPIWrite	0F0,1E
SPIWrite	0F1,79
SPIWrite	0F2,04
SPIWrite	0F5,7E
SPIWrite	0F4,00
SPIWrite	0F4,00
SPIWrite	0F0,1F
SPIWrite	0F1,34
SPIWrite	0F2,44
SPIWrite	0F5,7E
SPIWrite	0F4,00
SPIWrite	0F4,00
SPIWrite	0F0,20
SPIWrite	0F1,34
SPIWrite	0F2,44
SPIWrite	0F5,7E
SPIWrite	0F4,00
SPIWrite	0F4,00
SPIWrite	0F0,21
SPIWrite	0F1,79
SPIWrite	0F2,04
SPIWrite	0F5,7E
SPIWrite	0F4,00
SPIWrite	0F4,00
SPIWrite	0F0,22
SPIWrite	0F1,40
SPIWrite	0F2,F0
SPIWrite	0F5,7E
SPIWrite	0F4,00
SPIWrite	0F4,00
SPIWrite	0F0,23
SPIWrite	0F1,1B
SPIWrite	0F2,07
SPIWrite	0F5,7E
SPIWrite	0F4,00
SPIWrite	0F4,00
SPIWrite	0F0,24
SPIWrite	0F1,47
SPIWrite	0F2,04
SPIWrite	0F5,7E
SPIWrite	0F4,00
SPIWrite	0F4,00
SPIWrite	0F0,25
SPIWrite	0F1,B8
SPIWrite	0F2,F8
SPIWrite	0F5,7E
SPIWrite	0F4,00
SPIWrite	0F4,00
SPIWrite	0F0,26
SPIWrite	0F1,FD
SPIWrite	0F2,01
SPIWrite	0F5,7E
SPIWrite	0F4,00
SPIWrite	0F4,00
SPIWrite	0F0,27
SPIWrite	0F1,E8
SPIWrite	0F2,03
SPIWrite	0F5,7E
SPIWrite	0F4,00
SPIWrite	0F4,00
SPIWrite	0F0,28
SPIWrite	0F1,C1
SPIWrite	0F2,FB
SPIWrite	0F5,7E
SPIWrite	0F4,00
SPIWrite	0F4,00
SPIWrite	0F0,29
SPIWrite	0F1,FE
SPIWrite	0F2,FF
SPIWrite	0F5,7E
SPIWrite	0F4,00
SPIWrite	0F4,00
SPIWrite	0F0,2A
SPIWrite	0F1,64
SPIWrite	0F2,03
SPIWrite	0F5,7E
SPIWrite	0F4,00
SPIWrite	0F4,00
SPIWrite	0F0,2B
SPIWrite	0F1,8C
SPIWrite	0F2,FD
SPIWrite	0F5,7E
SPIWrite	0F4,00
SPIWrite	0F4,00
SPIWrite	0F0,2C
SPIWrite	0F1,01
SPIWrite	0F2,FF
SPIWrite	0F5,7E
SPIWrite	0F4,00
SPIWrite	0F4,00
SPIWrite	0F0,2D
SPIWrite	0F1,C6
SPIWrite	0F2,02
SPIWrite	0F5,7E
SPIWrite	0F4,00
SPIWrite	0F4,00
SPIWrite	0F0,2E
SPIWrite	0F1,CA
SPIWrite	0F2,FE
SPIWrite	0F5,7E
SPIWrite	0F4,00
SPIWrite	0F4,00
SPIWrite	0F0,2F
SPIWrite	0F1,8B
SPIWrite	0F2,FE
SPIWrite	0F5,7E
SPIWrite	0F4,00
SPIWrite	0F4,00
SPIWrite	0F0,30
SPIWrite	0F1,1F
SPIWrite	0F2,02
SPIWrite	0F5,7E
SPIWrite	0F4,00
SPIWrite	0F4,00
SPIWrite	0F0,31
SPIWrite	0F1,AD
SPIWrite	0F2,FF
SPIWrite	0F5,7E
SPIWrite	0F4,00
SPIWrite	0F4,00
SPIWrite	0F0,32
SPIWrite	0F1,6A
SPIWrite	0F2,FE
SPIWrite	0F5,7E
SPIWrite	0F4,00
SPIWrite	0F4,00
SPIWrite	0F0,33
SPIWrite	0F1,79
SPIWrite	0F2,01
SPIWrite	0F5,7E
SPIWrite	0F4,00
SPIWrite	0F4,00
SPIWrite	0F0,34
SPIWrite	0F1,47
SPIWrite	0F2,00
SPIWrite	0F5,7E
SPIWrite	0F4,00
SPIWrite	0F4,00
SPIWrite	0F0,35
SPIWrite	0F1,81
SPIWrite	0F2,FE
SPIWrite	0F5,7E
SPIWrite	0F4,00
SPIWrite	0F4,00
SPIWrite	0F0,36
SPIWrite	0F1,E1
SPIWrite	0F2,00
SPIWrite	0F5,7E
SPIWrite	0F4,00
SPIWrite	0F4,00
SPIWrite	0F0,37
SPIWrite	0F1,A7
SPIWrite	0F2,00
SPIWrite	0F5,7E
SPIWrite	0F4,00
SPIWrite	0F4,00
SPIWrite	0F0,38
SPIWrite	0F1,BA
SPIWrite	0F2,FE
SPIWrite	0F5,7E
SPIWrite	0F4,00
SPIWrite	0F4,00
SPIWrite	0F0,39
SPIWrite	0F1,65
SPIWrite	0F2,00
SPIWrite	0F5,7E
SPIWrite	0F4,00
SPIWrite	0F4,00
SPIWrite	0F0,3A
SPIWrite	0F1,C9
SPIWrite	0F2,00
SPIWrite	0F5,7E
SPIWrite	0F4,00
SPIWrite	0F4,00
SPIWrite	0F0,3B
SPIWrite	0F1,2A
SPIWrite	0F2,FF
SPIWrite	0F5,7E
SPIWrite	0F4,00
SPIWrite	0F4,00
SPIWrite	0F0,3C
SPIWrite	0F1,A5
SPIWrite	0F2,FF
SPIWrite	0F5,7E
SPIWrite	0F4,00
SPIWrite	0F4,00
SPIWrite	0F0,3D
SPIWrite	0F1,D9
SPIWrite	0F2,01
SPIWrite	0F5,7E
SPIWrite	0F4,00
SPIWrite	0F4,00
SPIWrite	0F0,3E
SPIWrite	0F1,90
SPIWrite	0F2,FC
SPIWrite	0F5,7E
SPIWrite	0F4,00
SPIWrite	0F4,00
SPIWrite	0F0,3F
SPIWrite	0F1,8D
SPIWrite	0F2,FE
SPIWrite	0F5,7E
SPIWrite	0F4,00
SPIWrite	0F4,00
SPIWrite	0F5,78	// Disable clock to Rx Filter

//************************************************************
// Setup the Parallel Port (Digital Data Interface)
//************************************************************
SPIWrite	010,C8	// I/O Config.  Tx Swap IQ; Rx Swap IQ; Tx CH Swap, Rx CH Swap; Rx Frame Mode; 2R2T bit; Invert data bus; Invert DATA_CLK
SPIWrite	011,00	// I/O Config.  Alt Word Order; -Rx1; -Rx2; -Tx1; -Tx2; Invert Rx Frame; Delay Rx Data
SPIWrite	012,10	// I/O Config.  Rx=2*Tx; Swap Ports; SDR; LVDS; Half Duplex; Single Port; Full Port; Swap Bits
SPIWrite	006,50	// PPORT Rx Delay (adjusts Tco Dataclk->Data)
SPIWrite	007,03	// PPORT TX Delay (adjusts setup/hold FBCLK->Data)

SPIWrite	03C,25	// CLK_OUT slew; LVDS: Rx Term; Bypass Bias R; Tx LO VCM; Bias[2:0]
SPIWrite	03D,3F	// LVDS polarity invert
SPIWrite	03E,00	// LVDS polarity invert

//************************************************************
// Setup AuxDAC
//************************************************************
SPIWrite	018,00	// AuxDAC1 Word[9:2]
SPIWrite	019,00	// AuxDAC2 Word[9:2]
SPIWrite	01A,00	// AuxDAC1 Config and Word[1:0]
SPIWrite	01B,00	// AuxDAC2 Config and Word[1:0]
SPIWrite	023,FF	// AuxDAC Manaul/Auto Control
SPIWrite	026,10	// AuxDAC Manual Select Bit/GPO Manual Select
SPIWrite	030,00	// AuxDAC1 Rx Delay
SPIWrite	031,00	// AuxDAC1 Tx Delay
SPIWrite	032,00	// AuxDAC2 Rx Delay
SPIWrite	033,00	// AuxDAC2 Tx Delay

//************************************************************
// Setup AuxADC
//************************************************************
SPIWrite	00B,00	// Temp Sensor Setup (Offset)
SPIWrite	00C,00	// Temp Sensor Setup (Temp Window)
SPIWrite	00D,03	// Temp Sensor Setup (Periodic Measure)
SPIWrite	00F,04	// Temp Sensor Setup (Decimation)
SPIWrite	01C,10	// AuxADC Setup (Clock Div)
SPIWrite	01D,01	// AuxADC Setup (Decimation/Enable)

//************************************************************
// Setup Control Outs
//************************************************************
SPIWrite	035,03	// Ctrl Out index
SPIWrite	036,FF	// Ctrl Out [7:0] output enable

//************************************************************
// Setup GPO
//************************************************************
SPIWrite	03A,25	// Set number of REFCLK cycles for 1us delay timer
SPIWrite	020,00	// GPO Auto Enable Setup in RX and TX
SPIWrite	027,50	// GPO Manual and GPO auto value in ALERT
SPIWrite	028,00	// GPO_0 RX Delay
SPIWrite	029,00	// GPO_1 RX Delay
SPIWrite	02A,00	// GPO_2 RX Delay
SPIWrite	02B,00	// GPO_3 RX Delay
SPIWrite	02C,00	// GPO_0 TX Delay
SPIWrite	02D,00	// GPO_1 TX Delay
SPIWrite	02E,00	// GPO_2 TX Delay
SPIWrite	02F,00	// GPO_3 TX Delay

//************************************************************
// Setup RF PLL non-frequency-dependent registers
//************************************************************
SPIWrite	261,00	// Set Rx LO Power mode
SPIWrite	2A1,00	// Set Tx LO Power mode
SPIWrite	248,0B	// Enable Rx VCO LDO
SPIWrite	288,0B	// Enable Tx VCO LDO
SPIWrite	246,02	// Set VCO Power down TCF bits
SPIWrite	286,02	// Set VCO Power down TCF bits
SPIWrite	249,8E	// Set VCO cal length
SPIWrite	289,8E	// Set VCO cal length
SPIWrite	23B,80	// Enable Rx VCO cal
SPIWrite	27B,80	// Enable Tx VCO cal
SPIWrite	243,0D	// Set Rx prescaler bias
SPIWrite	283,0D	// Set Tx prescaler bias
SPIWrite	23D,00	// Clear Half VCO cal clock setting
SPIWrite	27D,00	// Clear Half VCO cal clock setting

SPIWrite	015,04	// Set Dual Synth mode bit
SPIWrite	014,0D	// Set Force ALERT State bit
SPIWrite	013,01	// Set ENSM FDD mode
WAIT	1	// waits 1 ms

SPIWrite	23D,04	// Start RX CP cal
WAIT_CALDONE	RXCP,100	// Wait for CP cal to complete, Max RXCP Cal time: 480.000 (us)(Done when 0x244[7]==1)

SPIWrite	27D,04	// Start TX CP cal
WAIT_CALDONE	TXCP,100	// Wait for CP cal to complete, Max TXCP Cal time: 480.000 (us)(Done when 0x284[7]==1)

//************************************************************
// FDD RX,TX Synth Frequency: 1950.000000,2140.000000 MHz
//************************************************************
//************************************************************
// Setup Rx Frequency-Dependent Syntheisizer Registers
//************************************************************
SPIWrite	23A,4A	// Set VCO Output level[3:0]
SPIWrite	239,C1	// Set Init ALC Value[3:0] and VCO Varactor[3:0]
SPIWrite	242,0E	// Set VCO Bias Tcf[1:0] and VCO Bias Ref[2:0]
SPIWrite	238,78	// Set VCO Cal Offset[3:0]
SPIWrite	245,00	// Set VCO Cal Ref Tcf[2:0]
SPIWrite	251,0B	// Set VCO Varactor Reference[3:0]
SPIWrite	250,70	// Set VCO Varactor Ref Tcf[2:0] and VCO Varactor Offset[3:0]
SPIWrite	23B,92	// Set Synth Loop Filter charge pump current (Icp)
SPIWrite	23E,D4	// Set Synth Loop Filter C2 and C1
SPIWrite	23F,DF	// Set Synth Loop Filter  R1 and C3
SPIWrite	240,09	// Set Synth Loop Filter R3

//************************************************************
// Setup Tx Frequency-Dependent Syntheisizer Registers
//************************************************************
SPIWrite	27A,4A	// Set VCO Output level[3:0]
SPIWrite	279,C1	// Set Init ALC Value[3:0] and VCO Varactor[3:0]
SPIWrite	282,0E	// Set VCO Bias Tcf[1:0] and VCO Bias Ref[2:0]
SPIWrite	278,78	// Set VCO Cal Offset[3:0]
SPIWrite	285,00	// Set VCO Cal Ref Tcf[2:0]
SPIWrite	291,0B	// Set VCO Varactor Reference[3:0]
SPIWrite	290,70	// Set VCO Varactor Ref Tcf[2:0] and VCO Varactor Offset[3:0]
SPIWrite	27B,8F	// Set Synth Loop Filter charge pump current (Icp)
SPIWrite	27E,D4	// Set Synth Loop Filter C2 and C1
SPIWrite	27F,DF	// Set Synth Loop Filter  R1 and C3
SPIWrite	280,09	// Set Synth Loop Filter R3

//************************************************************
// Write Rx and Tx Frequency Words
//************************************************************
SPIWrite	233,F8	// Write Rx Synth Fractional Freq Word[7:0]
SPIWrite	234,FF	// Write Rx Synth Fractional Freq Word[15:8]
SPIWrite	235,47	// Write Rx Synth Fractional Freq Word[22:16]
SPIWrite	232,00	// Write Rx Synth Integer Freq Word[10:8]
SPIWrite	231,65	// Write Rx Synth Integer Freq Word[7:0]
SPIWrite	005,11	// Set LO divider setting
SPIWrite	273,A4	// Write Tx Synth Fractional Freq Word[7:0]
SPIWrite	274,AA	// Write Tx Synth Fractional Freq Word[15:8]
SPIWrite	275,3A	// Write Tx Synth Fractional Freq Word[22:16]
SPIWrite	272,00	// Write Tx Synth Integer Freq Word[10:8]
SPIWrite	271,6F	// Write Tx Synth Integer Freq Word[7:0] (starts VCO cal)
SPIWrite	005,11	// Set LO divider setting
SPIRead	247	// Check RX RF PLL lock status (0x247[1]==1 is locked)
SPIRead	287	// Check TX RF PLL lock status (0x287[1]==1 is locked)

//************************************************************
// Program Mixer GM Sub-table
//************************************************************
SPIWrite	13F,02	// Start Clock
SPIWrite	138,0F	// Addr Table Index
SPIWrite	139,78	// Gain
SPIWrite	13A,00	// Bias
SPIWrite	13B,00	// GM
SPIWrite	13F,06	// Write Words
SPIWrite	13C,00	// Delay for 3 ADCCLK/16 clock cycles (Dummy Write)
SPIWrite	13C,00	// Delay ~1us (Dummy Write)
SPIWrite	138,0E	// Addr Table Index
SPIWrite	139,74	// Gain
SPIWrite	13A,00	// Bias
SPIWrite	13B,0D	// GM
SPIWrite	13F,06	// Write Words
SPIWrite	13C,00	// Delay for 3 ADCCLK/16 clock cycles (Dummy Write)
SPIWrite	13C,00	// Delay ~1us (Dummy Write)
SPIWrite	138,0D	// Addr Table Index
SPIWrite	139,70	// Gain
SPIWrite	13A,00	// Bias
SPIWrite	13B,15	// GM
SPIWrite	13F,06	// Write Words
SPIWrite	13C,00	// Delay for 3 ADCCLK/16 clock cycles (Dummy Write)
SPIWrite	13C,00	// Delay ~1us (Dummy Write)
SPIWrite	138,0C	// Addr Table Index
SPIWrite	139,6C	// Gain
SPIWrite	13A,00	// Bias
SPIWrite	13B,1B	// GM
SPIWrite	13F,06	// Write Words
SPIWrite	13C,00	// Delay for 3 ADCCLK/16 clock cycles (Dummy Write)
SPIWrite	13C,00	// Delay ~1us (Dummy Write)
SPIWrite	138,0B	// Addr Table Index
SPIWrite	139,68	// Gain
SPIWrite	13A,00	// Bias
SPIWrite	13B,21	// GM
SPIWrite	13F,06	// Write Words
SPIWrite	13C,00	// Delay for 3 ADCCLK/16 clock cycles (Dummy Write)
SPIWrite	13C,00	// Delay ~1us (Dummy Write)
SPIWrite	138,0A	// Addr Table Index
SPIWrite	139,64	// Gain
SPIWrite	13A,00	// Bias
SPIWrite	13B,25	// GM
SPIWrite	13F,06	// Write Words
SPIWrite	13C,00	// Delay for 3 ADCCLK/16 clock cycles (Dummy Write)
SPIWrite	13C,00	// Delay ~1us (Dummy Write)
SPIWrite	138,09	// Addr Table Index
SPIWrite	139,60	// Gain
SPIWrite	13A,00	// Bias
SPIWrite	13B,29	// GM
SPIWrite	13F,06	// Write Words
SPIWrite	13C,00	// Delay for 3 ADCCLK/16 clock cycles (Dummy Write)
SPIWrite	13C,00	// Delay ~1us (Dummy Write)
SPIWrite	138,08	// Addr Table Index
SPIWrite	139,5C	// Gain
SPIWrite	13A,00	// Bias
SPIWrite	13B,2C	// GM
SPIWrite	13F,06	// Write Words
SPIWrite	13C,00	// Delay for 3 ADCCLK/16 clock cycles (Dummy Write)
SPIWrite	13C,00	// Delay ~1us (Dummy Write)
SPIWrite	138,07	// Addr Table Index
SPIWrite	139,58	// Gain
SPIWrite	13A,00	// Bias
SPIWrite	13B,2F	// GM
SPIWrite	13F,06	// Write Words
SPIWrite	13C,00	// Delay for 3 ADCCLK/16 clock cycles (Dummy Write)
SPIWrite	13C,00	// Delay ~1us (Dummy Write)
SPIWrite	138,06	// Addr Table Index
SPIWrite	139,54	// Gain
SPIWrite	13A,00	// Bias
SPIWrite	13B,31	// GM
SPIWrite	13F,06	// Write Words
SPIWrite	13C,00	// Delay for 3 ADCCLK/16 clock cycles (Dummy Write)
SPIWrite	13C,00	// Delay ~1us (Dummy Write)
SPIWrite	138,05	// Addr Table Index
SPIWrite	139,50	// Gain
SPIWrite	13A,00	// Bias
SPIWrite	13B,33	// GM
SPIWrite	13F,06	// Write Words
SPIWrite	13C,00	// Delay for 3 ADCCLK/16 clock cycles (Dummy Write)
SPIWrite	13C,00	// Delay ~1us (Dummy Write)
SPIWrite	138,04	// Addr Table Index
SPIWrite	139,4C	// Gain
SPIWrite	13A,00	// Bias
SPIWrite	13B,34	// GM
SPIWrite	13F,06	// Write Words
SPIWrite	13C,00	// Delay for 3 ADCCLK/16 clock cycles (Dummy Write)
SPIWrite	13C,00	// Delay ~1us (Dummy Write)
SPIWrite	138,03	// Addr Table Index
SPIWrite	139,48	// Gain
SPIWrite	13A,00	// Bias
SPIWrite	13B,35	// GM
SPIWrite	13F,06	// Write Words
SPIWrite	13C,00	// Delay for 3 ADCCLK/16 clock cycles (Dummy Write)
SPIWrite	13C,00	// Delay ~1us (Dummy Write)
SPIWrite	138,02	// Addr Table Index
SPIWrite	139,30	// Gain
SPIWrite	13A,00	// Bias
SPIWrite	13B,3A	// GM
SPIWrite	13F,06	// Write Words
SPIWrite	13C,00	// Delay for 3 ADCCLK/16 clock cycles (Dummy Write)
SPIWrite	13C,00	// Delay ~1us (Dummy Write)
SPIWrite	138,01	// Addr Table Index
SPIWrite	139,18	// Gain
SPIWrite	13A,00	// Bias
SPIWrite	13B,3D	// GM
SPIWrite	13F,06	// Write Words
SPIWrite	13C,00	// Delay for 3 ADCCLK/16 clock cycles (Dummy Write)
SPIWrite	13C,00	// Delay ~1us (Dummy Write)
SPIWrite	138,00	// Addr Table Index
SPIWrite	139,00	// Gain
SPIWrite	13A,00	// Bias
SPIWrite	13B,3E	// GM
SPIWrite	13F,06	// Write Words
SPIWrite	13C,00	// Delay for 3 ADCCLK/16 clock cycles (Dummy Write)
SPIWrite	13C,00	// Delay ~1us (Dummy Write)
SPIWrite	13F,02	// Clear Write Bit
SPIWrite	13C,00	// Delay for 3 ADCCLK/16 clock cycles (Dummy Write)
SPIWrite	13C,00	// Delay ~1us (Dummy Write)
SPIWrite	13F,00	// Stop Clock

//************************************************************
// Program Rx Gain Tables with GainTable2300MHz.csv
//************************************************************

SPIWrite	137,1A	// Start Gain Table Clock
SPIWrite	130,00	// Gain Table Index
SPIWrite	131,00	// Ext LNA, Int LNA, & Mixer Gain Word
SPIWrite	132,00	// TIA & LPF Word
SPIWrite	133,20	// DC Cal bit & Dig Gain Word
SPIWrite	137,1E	// Write Words
SPIWrite	134,00	// Dummy Write to delay 3 ADCCLK/16 cycles
SPIWrite	134,00	// Dummy Write to delay ~1us
SPIWrite	130,01	// Gain Table Index
SPIWrite	131,00	// Ext LNA, Int LNA, & Mixer Gain Word
SPIWrite	132,00	// TIA & LPF Word
SPIWrite	133,00	// DC Cal bit & Dig Gain Word
SPIWrite	137,1E	// Write Words
SPIWrite	134,00	// Dummy Write to delay 3 ADCCLK/16 cycles
SPIWrite	134,00	// Dummy Write to delay ~1us
SPIWrite	130,02	// Gain Table Index
SPIWrite	131,00	// Ext LNA, Int LNA, & Mixer Gain Word
SPIWrite	132,00	// TIA & LPF Word
SPIWrite	133,00	// DC Cal bit & Dig Gain Word
SPIWrite	137,1E	// Write Words
SPIWrite	134,00	// Dummy Write to delay 3 ADCCLK/16 cycles
SPIWrite	134,00	// Dummy Write to delay ~1us
SPIWrite	130,03	// Gain Table Index
SPIWrite	131,00	// Ext LNA, Int LNA, & Mixer Gain Word
SPIWrite	132,01	// TIA & LPF Word
SPIWrite	133,00	// DC Cal bit & Dig Gain Word
SPIWrite	137,1E	// Write Words
SPIWrite	134,00	// Dummy Write to delay 3 ADCCLK/16 cycles
SPIWrite	134,00	// Dummy Write to delay ~1us
SPIWrite	130,04	// Gain Table Index
SPIWrite	131,00	// Ext LNA, Int LNA, & Mixer Gain Word
SPIWrite	132,02	// TIA & LPF Word
SPIWrite	133,00	// DC Cal bit & Dig Gain Word
SPIWrite	137,1E	// Write Words
SPIWrite	134,00	// Dummy Write to delay 3 ADCCLK/16 cycles
SPIWrite	134,00	// Dummy Write to delay ~1us
SPIWrite	130,05	// Gain Table Index
SPIWrite	131,00	// Ext LNA, Int LNA, & Mixer Gain Word
SPIWrite	132,03	// TIA & LPF Word
SPIWrite	133,00	// DC Cal bit & Dig Gain Word
SPIWrite	137,1E	// Write Words
SPIWrite	134,00	// Dummy Write to delay 3 ADCCLK/16 cycles
SPIWrite	134,00	// Dummy Write to delay ~1us
SPIWrite	130,06	// Gain Table Index
SPIWrite	131,00	// Ext LNA, Int LNA, & Mixer Gain Word
SPIWrite	132,04	// TIA & LPF Word
SPIWrite	133,00	// DC Cal bit & Dig Gain Word
SPIWrite	137,1E	// Write Words
SPIWrite	134,00	// Dummy Write to delay 3 ADCCLK/16 cycles
SPIWrite	134,00	// Dummy Write to delay ~1us
SPIWrite	130,07	// Gain Table Index
SPIWrite	131,00	// Ext LNA, Int LNA, & Mixer Gain Word
SPIWrite	132,05	// TIA & LPF Word
SPIWrite	133,00	// DC Cal bit & Dig Gain Word
SPIWrite	137,1E	// Write Words
SPIWrite	134,00	// Dummy Write to delay 3 ADCCLK/16 cycles
SPIWrite	134,00	// Dummy Write to delay ~1us
SPIWrite	130,08	// Gain Table Index
SPIWrite	131,01	// Ext LNA, Int LNA, & Mixer Gain Word
SPIWrite	132,03	// TIA & LPF Word
SPIWrite	133,20	// DC Cal bit & Dig Gain Word
SPIWrite	137,1E	// Write Words
SPIWrite	134,00	// Dummy Write to delay 3 ADCCLK/16 cycles
SPIWrite	134,00	// Dummy Write to delay ~1us
SPIWrite	130,09	// Gain Table Index
SPIWrite	131,01	// Ext LNA, Int LNA, & Mixer Gain Word
SPIWrite	132,04	// TIA & LPF Word
SPIWrite	133,00	// DC Cal bit & Dig Gain Word
SPIWrite	137,1E	// Write Words
SPIWrite	134,00	// Dummy Write to delay 3 ADCCLK/16 cycles
SPIWrite	134,00	// Dummy Write to delay ~1us
SPIWrite	130,0A	// Gain Table Index
SPIWrite	131,01	// Ext LNA, Int LNA, & Mixer Gain Word
SPIWrite	132,05	// TIA & LPF Word
SPIWrite	133,00	// DC Cal bit & Dig Gain Word
SPIWrite	137,1E	// Write Words
SPIWrite	134,00	// Dummy Write to delay 3 ADCCLK/16 cycles
SPIWrite	134,00	// Dummy Write to delay ~1us
SPIWrite	130,0B	// Gain Table Index
SPIWrite	131,01	// Ext LNA, Int LNA, & Mixer Gain Word
SPIWrite	132,06	// TIA & LPF Word
SPIWrite	133,00	// DC Cal bit & Dig Gain Word
SPIWrite	137,1E	// Write Words
SPIWrite	134,00	// Dummy Write to delay 3 ADCCLK/16 cycles
SPIWrite	134,00	// Dummy Write to delay ~1us
SPIWrite	130,0C	// Gain Table Index
SPIWrite	131,01	// Ext LNA, Int LNA, & Mixer Gain Word
SPIWrite	132,07	// TIA & LPF Word
SPIWrite	133,00	// DC Cal bit & Dig Gain Word
SPIWrite	137,1E	// Write Words
SPIWrite	134,00	// Dummy Write to delay 3 ADCCLK/16 cycles
SPIWrite	134,00	// Dummy Write to delay ~1us
SPIWrite	130,0D	// Gain Table Index
SPIWrite	131,01	// Ext LNA, Int LNA, & Mixer Gain Word
SPIWrite	132,08	// TIA & LPF Word
SPIWrite	133,00	// DC Cal bit & Dig Gain Word
SPIWrite	137,1E	// Write Words
SPIWrite	134,00	// Dummy Write to delay 3 ADCCLK/16 cycles
SPIWrite	134,00	// Dummy Write to delay ~1us
SPIWrite	130,0E	// Gain Table Index
SPIWrite	131,01	// Ext LNA, Int LNA, & Mixer Gain Word
SPIWrite	132,09	// TIA & LPF Word
SPIWrite	133,00	// DC Cal bit & Dig Gain Word
SPIWrite	137,1E	// Write Words
SPIWrite	134,00	// Dummy Write to delay 3 ADCCLK/16 cycles
SPIWrite	134,00	// Dummy Write to delay ~1us
SPIWrite	130,0F	// Gain Table Index
SPIWrite	131,01	// Ext LNA, Int LNA, & Mixer Gain Word
SPIWrite	132,0A	// TIA & LPF Word
SPIWrite	133,00	// DC Cal bit & Dig Gain Word
SPIWrite	137,1E	// Write Words
SPIWrite	134,00	// Dummy Write to delay 3 ADCCLK/16 cycles
SPIWrite	134,00	// Dummy Write to delay ~1us
SPIWrite	130,10	// Gain Table Index
SPIWrite	131,01	// Ext LNA, Int LNA, & Mixer Gain Word
SPIWrite	132,0B	// TIA & LPF Word
SPIWrite	133,00	// DC Cal bit & Dig Gain Word
SPIWrite	137,1E	// Write Words
SPIWrite	134,00	// Dummy Write to delay 3 ADCCLK/16 cycles
SPIWrite	134,00	// Dummy Write to delay ~1us
SPIWrite	130,11	// Gain Table Index
SPIWrite	131,01	// Ext LNA, Int LNA, & Mixer Gain Word
SPIWrite	132,0C	// TIA & LPF Word
SPIWrite	133,00	// DC Cal bit & Dig Gain Word
SPIWrite	137,1E	// Write Words
SPIWrite	134,00	// Dummy Write to delay 3 ADCCLK/16 cycles
SPIWrite	134,00	// Dummy Write to delay ~1us
SPIWrite	130,12	// Gain Table Index
SPIWrite	131,01	// Ext LNA, Int LNA, & Mixer Gain Word
SPIWrite	132,0D	// TIA & LPF Word
SPIWrite	133,00	// DC Cal bit & Dig Gain Word
SPIWrite	137,1E	// Write Words
SPIWrite	134,00	// Dummy Write to delay 3 ADCCLK/16 cycles
SPIWrite	134,00	// Dummy Write to delay ~1us
SPIWrite	130,13	// Gain Table Index
SPIWrite	131,01	// Ext LNA, Int LNA, & Mixer Gain Word
SPIWrite	132,0E	// TIA & LPF Word
SPIWrite	133,00	// DC Cal bit & Dig Gain Word
SPIWrite	137,1E	// Write Words
SPIWrite	134,00	// Dummy Write to delay 3 ADCCLK/16 cycles
SPIWrite	134,00	// Dummy Write to delay ~1us
SPIWrite	130,14	// Gain Table Index
SPIWrite	131,02	// Ext LNA, Int LNA, & Mixer Gain Word
SPIWrite	132,09	// TIA & LPF Word
SPIWrite	133,20	// DC Cal bit & Dig Gain Word
SPIWrite	137,1E	// Write Words
SPIWrite	134,00	// Dummy Write to delay 3 ADCCLK/16 cycles
SPIWrite	134,00	// Dummy Write to delay ~1us
SPIWrite	130,15	// Gain Table Index
SPIWrite	131,02	// Ext LNA, Int LNA, & Mixer Gain Word
SPIWrite	132,0A	// TIA & LPF Word
SPIWrite	133,00	// DC Cal bit & Dig Gain Word
SPIWrite	137,1E	// Write Words
SPIWrite	134,00	// Dummy Write to delay 3 ADCCLK/16 cycles
SPIWrite	134,00	// Dummy Write to delay ~1us
SPIWrite	130,16	// Gain Table Index
SPIWrite	131,02	// Ext LNA, Int LNA, & Mixer Gain Word
SPIWrite	132,0B	// TIA & LPF Word
SPIWrite	133,00	// DC Cal bit & Dig Gain Word
SPIWrite	137,1E	// Write Words
SPIWrite	134,00	// Dummy Write to delay 3 ADCCLK/16 cycles
SPIWrite	134,00	// Dummy Write to delay ~1us
SPIWrite	130,17	// Gain Table Index
SPIWrite	131,22	// Ext LNA, Int LNA, & Mixer Gain Word
SPIWrite	132,01	// TIA & LPF Word
SPIWrite	133,20	// DC Cal bit & Dig Gain Word
SPIWrite	137,1E	// Write Words
SPIWrite	134,00	// Dummy Write to delay 3 ADCCLK/16 cycles
SPIWrite	134,00	// Dummy Write to delay ~1us
SPIWrite	130,18	// Gain Table Index
SPIWrite	131,22	// Ext LNA, Int LNA, & Mixer Gain Word
SPIWrite	132,02	// TIA & LPF Word
SPIWrite	133,00	// DC Cal bit & Dig Gain Word
SPIWrite	137,1E	// Write Words
SPIWrite	134,00	// Dummy Write to delay 3 ADCCLK/16 cycles
SPIWrite	134,00	// Dummy Write to delay ~1us
SPIWrite	130,19	// Gain Table Index
SPIWrite	131,22	// Ext LNA, Int LNA, & Mixer Gain Word
SPIWrite	132,03	// TIA & LPF Word
SPIWrite	133,00	// DC Cal bit & Dig Gain Word
SPIWrite	137,1E	// Write Words
SPIWrite	134,00	// Dummy Write to delay 3 ADCCLK/16 cycles
SPIWrite	134,00	// Dummy Write to delay ~1us
SPIWrite	130,1A	// Gain Table Index
SPIWrite	131,22	// Ext LNA, Int LNA, & Mixer Gain Word
SPIWrite	132,04	// TIA & LPF Word
SPIWrite	133,00	// DC Cal bit & Dig Gain Word
SPIWrite	137,1E	// Write Words
SPIWrite	134,00	// Dummy Write to delay 3 ADCCLK/16 cycles
SPIWrite	134,00	// Dummy Write to delay ~1us
SPIWrite	130,1B	// Gain Table Index
SPIWrite	131,22	// Ext LNA, Int LNA, & Mixer Gain Word
SPIWrite	132,05	// TIA & LPF Word
SPIWrite	133,00	// DC Cal bit & Dig Gain Word
SPIWrite	137,1E	// Write Words
SPIWrite	134,00	// Dummy Write to delay 3 ADCCLK/16 cycles
SPIWrite	134,00	// Dummy Write to delay ~1us
SPIWrite	130,1C	// Gain Table Index
SPIWrite	131,24	// Ext LNA, Int LNA, & Mixer Gain Word
SPIWrite	132,00	// TIA & LPF Word
SPIWrite	133,20	// DC Cal bit & Dig Gain Word
SPIWrite	137,1E	// Write Words
SPIWrite	134,00	// Dummy Write to delay 3 ADCCLK/16 cycles
SPIWrite	134,00	// Dummy Write to delay ~1us
SPIWrite	130,1D	// Gain Table Index
SPIWrite	131,24	// Ext LNA, Int LNA, & Mixer Gain Word
SPIWrite	132,01	// TIA & LPF Word
SPIWrite	133,00	// DC Cal bit & Dig Gain Word
SPIWrite	137,1E	// Write Words
SPIWrite	134,00	// Dummy Write to delay 3 ADCCLK/16 cycles
SPIWrite	134,00	// Dummy Write to delay ~1us
SPIWrite	130,1E	// Gain Table Index
SPIWrite	131,24	// Ext LNA, Int LNA, & Mixer Gain Word
SPIWrite	132,02	// TIA & LPF Word
SPIWrite	133,00	// DC Cal bit & Dig Gain Word
SPIWrite	137,1E	// Write Words
SPIWrite	134,00	// Dummy Write to delay 3 ADCCLK/16 cycles
SPIWrite	134,00	// Dummy Write to delay ~1us
SPIWrite	130,1F	// Gain Table Index
SPIWrite	131,24	// Ext LNA, Int LNA, & Mixer Gain Word
SPIWrite	132,03	// TIA & LPF Word
SPIWrite	133,00	// DC Cal bit & Dig Gain Word
SPIWrite	137,1E	// Write Words
SPIWrite	134,00	// Dummy Write to delay 3 ADCCLK/16 cycles
SPIWrite	134,00	// Dummy Write to delay ~1us
SPIWrite	130,20	// Gain Table Index
SPIWrite	131,24	// Ext LNA, Int LNA, & Mixer Gain Word
SPIWrite	132,04	// TIA & LPF Word
SPIWrite	133,00	// DC Cal bit & Dig Gain Word
SPIWrite	137,1E	// Write Words
SPIWrite	134,00	// Dummy Write to delay 3 ADCCLK/16 cycles
SPIWrite	134,00	// Dummy Write to delay ~1us
SPIWrite	130,21	// Gain Table Index
SPIWrite	131,24	// Ext LNA, Int LNA, & Mixer Gain Word
SPIWrite	132,05	// TIA & LPF Word
SPIWrite	133,00	// DC Cal bit & Dig Gain Word
SPIWrite	137,1E	// Write Words
SPIWrite	134,00	// Dummy Write to delay 3 ADCCLK/16 cycles
SPIWrite	134,00	// Dummy Write to delay ~1us
SPIWrite	130,22	// Gain Table Index
SPIWrite	131,24	// Ext LNA, Int LNA, & Mixer Gain Word
SPIWrite	132,06	// TIA & LPF Word
SPIWrite	133,00	// DC Cal bit & Dig Gain Word
SPIWrite	137,1E	// Write Words
SPIWrite	134,00	// Dummy Write to delay 3 ADCCLK/16 cycles
SPIWrite	134,00	// Dummy Write to delay ~1us
SPIWrite	130,23	// Gain Table Index
SPIWrite	131,24	// Ext LNA, Int LNA, & Mixer Gain Word
SPIWrite	132,21	// TIA & LPF Word
SPIWrite	133,20	// DC Cal bit & Dig Gain Word
SPIWrite	137,1E	// Write Words
SPIWrite	134,00	// Dummy Write to delay 3 ADCCLK/16 cycles
SPIWrite	134,00	// Dummy Write to delay ~1us
SPIWrite	130,24	// Gain Table Index
SPIWrite	131,24	// Ext LNA, Int LNA, & Mixer Gain Word
SPIWrite	132,22	// TIA & LPF Word
SPIWrite	133,00	// DC Cal bit & Dig Gain Word
SPIWrite	137,1E	// Write Words
SPIWrite	134,00	// Dummy Write to delay 3 ADCCLK/16 cycles
SPIWrite	134,00	// Dummy Write to delay ~1us
SPIWrite	130,25	// Gain Table Index
SPIWrite	131,44	// Ext LNA, Int LNA, & Mixer Gain Word
SPIWrite	132,20	// TIA & LPF Word
SPIWrite	133,20	// DC Cal bit & Dig Gain Word
SPIWrite	137,1E	// Write Words
SPIWrite	134,00	// Dummy Write to delay 3 ADCCLK/16 cycles
SPIWrite	134,00	// Dummy Write to delay ~1us
SPIWrite	130,26	// Gain Table Index
SPIWrite	131,44	// Ext LNA, Int LNA, & Mixer Gain Word
SPIWrite	132,21	// TIA & LPF Word
SPIWrite	133,00	// DC Cal bit & Dig Gain Word
SPIWrite	137,1E	// Write Words
SPIWrite	134,00	// Dummy Write to delay 3 ADCCLK/16 cycles
SPIWrite	134,00	// Dummy Write to delay ~1us
SPIWrite	130,27	// Gain Table Index
SPIWrite	131,44	// Ext LNA, Int LNA, & Mixer Gain Word
SPIWrite	132,22	// TIA & LPF Word
SPIWrite	133,00	// DC Cal bit & Dig Gain Word
SPIWrite	137,1E	// Write Words
SPIWrite	134,00	// Dummy Write to delay 3 ADCCLK/16 cycles
SPIWrite	134,00	// Dummy Write to delay ~1us
SPIWrite	130,28	// Gain Table Index
SPIWrite	131,44	// Ext LNA, Int LNA, & Mixer Gain Word
SPIWrite	132,23	// TIA & LPF Word
SPIWrite	133,00	// DC Cal bit & Dig Gain Word
SPIWrite	137,1E	// Write Words
SPIWrite	134,00	// Dummy Write to delay 3 ADCCLK/16 cycles
SPIWrite	134,00	// Dummy Write to delay ~1us
SPIWrite	130,29	// Gain Table Index
SPIWrite	131,44	// Ext LNA, Int LNA, & Mixer Gain Word
SPIWrite	132,24	// TIA & LPF Word
SPIWrite	133,00	// DC Cal bit & Dig Gain Word
SPIWrite	137,1E	// Write Words
SPIWrite	134,00	// Dummy Write to delay 3 ADCCLK/16 cycles
SPIWrite	134,00	// Dummy Write to delay ~1us
SPIWrite	130,2A	// Gain Table Index
SPIWrite	131,44	// Ext LNA, Int LNA, & Mixer Gain Word
SPIWrite	132,25	// TIA & LPF Word
SPIWrite	133,00	// DC Cal bit & Dig Gain Word
SPIWrite	137,1E	// Write Words
SPIWrite	134,00	// Dummy Write to delay 3 ADCCLK/16 cycles
SPIWrite	134,00	// Dummy Write to delay ~1us
SPIWrite	130,2B	// Gain Table Index
SPIWrite	131,44	// Ext LNA, Int LNA, & Mixer Gain Word
SPIWrite	132,26	// TIA & LPF Word
SPIWrite	133,00	// DC Cal bit & Dig Gain Word
SPIWrite	137,1E	// Write Words
SPIWrite	134,00	// Dummy Write to delay 3 ADCCLK/16 cycles
SPIWrite	134,00	// Dummy Write to delay ~1us
SPIWrite	130,2C	// Gain Table Index
SPIWrite	131,44	// Ext LNA, Int LNA, & Mixer Gain Word
SPIWrite	132,27	// TIA & LPF Word
SPIWrite	133,00	// DC Cal bit & Dig Gain Word
SPIWrite	137,1E	// Write Words
SPIWrite	134,00	// Dummy Write to delay 3 ADCCLK/16 cycles
SPIWrite	134,00	// Dummy Write to delay ~1us
SPIWrite	130,2D	// Gain Table Index
SPIWrite	131,44	// Ext LNA, Int LNA, & Mixer Gain Word
SPIWrite	132,28	// TIA & LPF Word
SPIWrite	133,00	// DC Cal bit & Dig Gain Word
SPIWrite	137,1E	// Write Words
SPIWrite	134,00	// Dummy Write to delay 3 ADCCLK/16 cycles
SPIWrite	134,00	// Dummy Write to delay ~1us
SPIWrite	130,2E	// Gain Table Index
SPIWrite	131,44	// Ext LNA, Int LNA, & Mixer Gain Word
SPIWrite	132,29	// TIA & LPF Word
SPIWrite	133,00	// DC Cal bit & Dig Gain Word
SPIWrite	137,1E	// Write Words
SPIWrite	134,00	// Dummy Write to delay 3 ADCCLK/16 cycles
SPIWrite	134,00	// Dummy Write to delay ~1us
SPIWrite	130,2F	// Gain Table Index
SPIWrite	131,44	// Ext LNA, Int LNA, & Mixer Gain Word
SPIWrite	132,2A	// TIA & LPF Word
SPIWrite	133,00	// DC Cal bit & Dig Gain Word
SPIWrite	137,1E	// Write Words
SPIWrite	134,00	// Dummy Write to delay 3 ADCCLK/16 cycles
SPIWrite	134,00	// Dummy Write to delay ~1us
SPIWrite	130,30	// Gain Table Index
SPIWrite	131,44	// Ext LNA, Int LNA, & Mixer Gain Word
SPIWrite	132,2B	// TIA & LPF Word
SPIWrite	133,00	// DC Cal bit & Dig Gain Word
SPIWrite	137,1E	// Write Words
SPIWrite	134,00	// Dummy Write to delay 3 ADCCLK/16 cycles
SPIWrite	134,00	// Dummy Write to delay ~1us
SPIWrite	130,31	// Gain Table Index
SPIWrite	131,44	// Ext LNA, Int LNA, & Mixer Gain Word
SPIWrite	132,2C	// TIA & LPF Word
SPIWrite	133,00	// DC Cal bit & Dig Gain Word
SPIWrite	137,1E	// Write Words
SPIWrite	134,00	// Dummy Write to delay 3 ADCCLK/16 cycles
SPIWrite	134,00	// Dummy Write to delay ~1us
SPIWrite	130,32	// Gain Table Index
SPIWrite	131,44	// Ext LNA, Int LNA, & Mixer Gain Word
SPIWrite	132,2D	// TIA & LPF Word
SPIWrite	133,00	// DC Cal bit & Dig Gain Word
SPIWrite	137,1E	// Write Words
SPIWrite	134,00	// Dummy Write to delay 3 ADCCLK/16 cycles
SPIWrite	134,00	// Dummy Write to delay ~1us
SPIWrite	130,33	// Gain Table Index
SPIWrite	131,44	// Ext LNA, Int LNA, & Mixer Gain Word
SPIWrite	132,2E	// TIA & LPF Word
SPIWrite	133,00	// DC Cal bit & Dig Gain Word
SPIWrite	137,1E	// Write Words
SPIWrite	134,00	// Dummy Write to delay 3 ADCCLK/16 cycles
SPIWrite	134,00	// Dummy Write to delay ~1us
SPIWrite	130,34	// Gain Table Index
SPIWrite	131,44	// Ext LNA, Int LNA, & Mixer Gain Word
SPIWrite	132,2F	// TIA & LPF Word
SPIWrite	133,00	// DC Cal bit & Dig Gain Word
SPIWrite	137,1E	// Write Words
SPIWrite	134,00	// Dummy Write to delay 3 ADCCLK/16 cycles
SPIWrite	134,00	// Dummy Write to delay ~1us
SPIWrite	130,35	// Gain Table Index
SPIWrite	131,44	// Ext LNA, Int LNA, & Mixer Gain Word
SPIWrite	132,30	// TIA & LPF Word
SPIWrite	133,00	// DC Cal bit & Dig Gain Word
SPIWrite	137,1E	// Write Words
SPIWrite	134,00	// Dummy Write to delay 3 ADCCLK/16 cycles
SPIWrite	134,00	// Dummy Write to delay ~1us
SPIWrite	130,36	// Gain Table Index
SPIWrite	131,44	// Ext LNA, Int LNA, & Mixer Gain Word
SPIWrite	132,31	// TIA & LPF Word
SPIWrite	133,00	// DC Cal bit & Dig Gain Word
SPIWrite	137,1E	// Write Words
SPIWrite	134,00	// Dummy Write to delay 3 ADCCLK/16 cycles
SPIWrite	134,00	// Dummy Write to delay ~1us
SPIWrite	130,37	// Gain Table Index
SPIWrite	131,64	// Ext LNA, Int LNA, & Mixer Gain Word
SPIWrite	132,2E	// TIA & LPF Word
SPIWrite	133,20	// DC Cal bit & Dig Gain Word
SPIWrite	137,1E	// Write Words
SPIWrite	134,00	// Dummy Write to delay 3 ADCCLK/16 cycles
SPIWrite	134,00	// Dummy Write to delay ~1us
SPIWrite	130,38	// Gain Table Index
SPIWrite	131,64	// Ext LNA, Int LNA, & Mixer Gain Word
SPIWrite	132,2F	// TIA & LPF Word
SPIWrite	133,00	// DC Cal bit & Dig Gain Word
SPIWrite	137,1E	// Write Words
SPIWrite	134,00	// Dummy Write to delay 3 ADCCLK/16 cycles
SPIWrite	134,00	// Dummy Write to delay ~1us
SPIWrite	130,39	// Gain Table Index
SPIWrite	131,64	// Ext LNA, Int LNA, & Mixer Gain Word
SPIWrite	132,30	// TIA & LPF Word
SPIWrite	133,00	// DC Cal bit & Dig Gain Word
SPIWrite	137,1E	// Write Words
SPIWrite	134,00	// Dummy Write to delay 3 ADCCLK/16 cycles
SPIWrite	134,00	// Dummy Write to delay ~1us
SPIWrite	130,3A	// Gain Table Index
SPIWrite	131,64	// Ext LNA, Int LNA, & Mixer Gain Word
SPIWrite	132,31	// TIA & LPF Word
SPIWrite	133,00	// DC Cal bit & Dig Gain Word
SPIWrite	137,1E	// Write Words
SPIWrite	134,00	// Dummy Write to delay 3 ADCCLK/16 cycles
SPIWrite	134,00	// Dummy Write to delay ~1us
SPIWrite	130,3B	// Gain Table Index
SPIWrite	131,64	// Ext LNA, Int LNA, & Mixer Gain Word
SPIWrite	132,32	// TIA & LPF Word
SPIWrite	133,00	// DC Cal bit & Dig Gain Word
SPIWrite	137,1E	// Write Words
SPIWrite	134,00	// Dummy Write to delay 3 ADCCLK/16 cycles
SPIWrite	134,00	// Dummy Write to delay ~1us
SPIWrite	130,3C	// Gain Table Index
SPIWrite	131,64	// Ext LNA, Int LNA, & Mixer Gain Word
SPIWrite	132,33	// TIA & LPF Word
SPIWrite	133,00	// DC Cal bit & Dig Gain Word
SPIWrite	137,1E	// Write Words
SPIWrite	134,00	// Dummy Write to delay 3 ADCCLK/16 cycles
SPIWrite	134,00	// Dummy Write to delay ~1us
SPIWrite	130,3D	// Gain Table Index
SPIWrite	131,64	// Ext LNA, Int LNA, & Mixer Gain Word
SPIWrite	132,34	// TIA & LPF Word
SPIWrite	133,00	// DC Cal bit & Dig Gain Word
SPIWrite	137,1E	// Write Words
SPIWrite	134,00	// Dummy Write to delay 3 ADCCLK/16 cycles
SPIWrite	134,00	// Dummy Write to delay ~1us
SPIWrite	130,3E	// Gain Table Index
SPIWrite	131,64	// Ext LNA, Int LNA, & Mixer Gain Word
SPIWrite	132,35	// TIA & LPF Word
SPIWrite	133,00	// DC Cal bit & Dig Gain Word
SPIWrite	137,1E	// Write Words
SPIWrite	134,00	// Dummy Write to delay 3 ADCCLK/16 cycles
SPIWrite	134,00	// Dummy Write to delay ~1us
SPIWrite	130,3F	// Gain Table Index
SPIWrite	131,64	// Ext LNA, Int LNA, & Mixer Gain Word
SPIWrite	132,36	// TIA & LPF Word
SPIWrite	133,00	// DC Cal bit & Dig Gain Word
SPIWrite	137,1E	// Write Words
SPIWrite	134,00	// Dummy Write to delay 3 ADCCLK/16 cycles
SPIWrite	134,00	// Dummy Write to delay ~1us
SPIWrite	130,40	// Gain Table Index
SPIWrite	131,64	// Ext LNA, Int LNA, & Mixer Gain Word
SPIWrite	132,37	// TIA & LPF Word
SPIWrite	133,00	// DC Cal bit & Dig Gain Word
SPIWrite	137,1E	// Write Words
SPIWrite	134,00	// Dummy Write to delay 3 ADCCLK/16 cycles
SPIWrite	134,00	// Dummy Write to delay ~1us
SPIWrite	130,41	// Gain Table Index
SPIWrite	131,64	// Ext LNA, Int LNA, & Mixer Gain Word
SPIWrite	132,38	// TIA & LPF Word
SPIWrite	133,00	// DC Cal bit & Dig Gain Word
SPIWrite	137,1E	// Write Words
SPIWrite	134,00	// Dummy Write to delay 3 ADCCLK/16 cycles
SPIWrite	134,00	// Dummy Write to delay ~1us
SPIWrite	130,42	// Gain Table Index
SPIWrite	131,65	// Ext LNA, Int LNA, & Mixer Gain Word
SPIWrite	132,38	// TIA & LPF Word
SPIWrite	133,20	// DC Cal bit & Dig Gain Word
SPIWrite	137,1E	// Write Words
SPIWrite	134,00	// Dummy Write to delay 3 ADCCLK/16 cycles
SPIWrite	134,00	// Dummy Write to delay ~1us
SPIWrite	130,43	// Gain Table Index
SPIWrite	131,66	// Ext LNA, Int LNA, & Mixer Gain Word
SPIWrite	132,38	// TIA & LPF Word
SPIWrite	133,20	// DC Cal bit & Dig Gain Word
SPIWrite	137,1E	// Write Words
SPIWrite	134,00	// Dummy Write to delay 3 ADCCLK/16 cycles
SPIWrite	134,00	// Dummy Write to delay ~1us
SPIWrite	130,44	// Gain Table Index
SPIWrite	131,67	// Ext LNA, Int LNA, & Mixer Gain Word
SPIWrite	132,38	// TIA & LPF Word
SPIWrite	133,20	// DC Cal bit & Dig Gain Word
SPIWrite	137,1E	// Write Words
SPIWrite	134,00	// Dummy Write to delay 3 ADCCLK/16 cycles
SPIWrite	134,00	// Dummy Write to delay ~1us
SPIWrite	130,45	// Gain Table Index
SPIWrite	131,68	// Ext LNA, Int LNA, & Mixer Gain Word
SPIWrite	132,38	// TIA & LPF Word
SPIWrite	133,20	// DC Cal bit & Dig Gain Word
SPIWrite	137,1E	// Write Words
SPIWrite	134,00	// Dummy Write to delay 3 ADCCLK/16 cycles
SPIWrite	134,00	// Dummy Write to delay ~1us
SPIWrite	130,46	// Gain Table Index
SPIWrite	131,69	// Ext LNA, Int LNA, & Mixer Gain Word
SPIWrite	132,38	// TIA & LPF Word
SPIWrite	133,20	// DC Cal bit & Dig Gain Word
SPIWrite	137,1E	// Write Words
SPIWrite	134,00	// Dummy Write to delay 3 ADCCLK/16 cycles
SPIWrite	134,00	// Dummy Write to delay ~1us
SPIWrite	130,47	// Gain Table Index
SPIWrite	131,6A	// Ext LNA, Int LNA, & Mixer Gain Word
SPIWrite	132,38	// TIA & LPF Word
SPIWrite	133,20	// DC Cal bit & Dig Gain Word
SPIWrite	137,1E	// Write Words
SPIWrite	134,00	// Dummy Write to delay 3 ADCCLK/16 cycles
SPIWrite	134,00	// Dummy Write to delay ~1us
SPIWrite	130,48	// Gain Table Index
SPIWrite	131,6B	// Ext LNA, Int LNA, & Mixer Gain Word
SPIWrite	132,38	// TIA & LPF Word
SPIWrite	133,20	// DC Cal bit & Dig Gain Word
SPIWrite	137,1E	// Write Words
SPIWrite	134,00	// Dummy Write to delay 3 ADCCLK/16 cycles
SPIWrite	134,00	// Dummy Write to delay ~1us
SPIWrite	130,49	// Gain Table Index
SPIWrite	131,6C	// Ext LNA, Int LNA, & Mixer Gain Word
SPIWrite	132,38	// TIA & LPF Word
SPIWrite	133,20	// DC Cal bit & Dig Gain Word
SPIWrite	137,1E	// Write Words
SPIWrite	134,00	// Dummy Write to delay 3 ADCCLK/16 cycles
SPIWrite	134,00	// Dummy Write to delay ~1us
SPIWrite	130,4A	// Gain Table Index
SPIWrite	131,6D	// Ext LNA, Int LNA, & Mixer Gain Word
SPIWrite	132,38	// TIA & LPF Word
SPIWrite	133,20	// DC Cal bit & Dig Gain Word
SPIWrite	137,1E	// Write Words
SPIWrite	134,00	// Dummy Write to delay 3 ADCCLK/16 cycles
SPIWrite	134,00	// Dummy Write to delay ~1us
SPIWrite	130,4B	// Gain Table Index
SPIWrite	131,6E	// Ext LNA, Int LNA, & Mixer Gain Word
SPIWrite	132,38	// TIA & LPF Word
SPIWrite	133,20	// DC Cal bit & Dig Gain Word
SPIWrite	137,1E	// Write Words
SPIWrite	134,00	// Dummy Write to delay 3 ADCCLK/16 cycles
SPIWrite	134,00	// Dummy Write to delay ~1us
SPIWrite	130,4C	// Gain Table Index
SPIWrite	131,6F	// Ext LNA, Int LNA, & Mixer Gain Word
SPIWrite	132,38	// TIA & LPF Word
SPIWrite	133,20	// DC Cal bit & Dig Gain Word
SPIWrite	137,1E	// Write Words
SPIWrite	134,00	// Dummy Write to delay 3 ADCCLK/16 cycles
SPIWrite	134,00	// Dummy Write to delay ~1us
SPIWrite	130,4D	// Gain Table Index
SPIWrite	131,00	// Ext LNA, Int LNA, & Mixer Gain Word
SPIWrite	132,00	// TIA & LPF Word
SPIWrite	133,00	// DC Cal bit & Dig Gain Word
SPIWrite	137,1E	// Write Words
SPIWrite	134,00	// Dummy Write to delay 3 ADCCLK/16 cycles
SPIWrite	134,00	// Dummy Write to delay ~1us
SPIWrite	130,4E	// Gain Table Index
SPIWrite	131,00	// Ext LNA, Int LNA, & Mixer Gain Word
SPIWrite	132,00	// TIA & LPF Word
SPIWrite	133,00	// DC Cal bit & Dig Gain Word
SPIWrite	137,1E	// Write Words
SPIWrite	134,00	// Dummy Write to delay 3 ADCCLK/16 cycles
SPIWrite	134,00	// Dummy Write to delay ~1us
SPIWrite	130,4F	// Gain Table Index
SPIWrite	131,00	// Ext LNA, Int LNA, & Mixer Gain Word
SPIWrite	132,00	// TIA & LPF Word
SPIWrite	133,00	// DC Cal bit & Dig Gain Word
SPIWrite	137,1E	// Write Words
SPIWrite	134,00	// Dummy Write to delay 3 ADCCLK/16 cycles
SPIWrite	134,00	// Dummy Write to delay ~1us
SPIWrite	130,50	// Gain Table Index
SPIWrite	131,00	// Ext LNA, Int LNA, & Mixer Gain Word
SPIWrite	132,00	// TIA & LPF Word
SPIWrite	133,00	// DC Cal bit & Dig Gain Word
SPIWrite	137,1E	// Write Words
SPIWrite	134,00	// Dummy Write to delay 3 ADCCLK/16 cycles
SPIWrite	134,00	// Dummy Write to delay ~1us
SPIWrite	130,51	// Gain Table Index
SPIWrite	131,00	// Ext LNA, Int LNA, & Mixer Gain Word
SPIWrite	132,00	// TIA & LPF Word
SPIWrite	133,00	// DC Cal bit & Dig Gain Word
SPIWrite	137,1E	// Write Words
SPIWrite	134,00	// Dummy Write to delay 3 ADCCLK/16 cycles
SPIWrite	134,00	// Dummy Write to delay ~1us
SPIWrite	130,52	// Gain Table Index
SPIWrite	131,00	// Ext LNA, Int LNA, & Mixer Gain Word
SPIWrite	132,00	// TIA & LPF Word
SPIWrite	133,00	// DC Cal bit & Dig Gain Word
SPIWrite	137,1E	// Write Words
SPIWrite	134,00	// Dummy Write to delay 3 ADCCLK/16 cycles
SPIWrite	134,00	// Dummy Write to delay ~1us
SPIWrite	130,53	// Gain Table Index
SPIWrite	131,00	// Ext LNA, Int LNA, & Mixer Gain Word
SPIWrite	132,00	// TIA & LPF Word
SPIWrite	133,00	// DC Cal bit & Dig Gain Word
SPIWrite	137,1E	// Write Words
SPIWrite	134,00	// Dummy Write to delay 3 ADCCLK/16 cycles
SPIWrite	134,00	// Dummy Write to delay ~1us
SPIWrite	130,54	// Gain Table Index
SPIWrite	131,00	// Ext LNA, Int LNA, & Mixer Gain Word
SPIWrite	132,00	// TIA & LPF Word
SPIWrite	133,00	// DC Cal bit & Dig Gain Word
SPIWrite	137,1E	// Write Words
SPIWrite	134,00	// Dummy Write to delay 3 ADCCLK/16 cycles
SPIWrite	134,00	// Dummy Write to delay ~1us
SPIWrite	130,55	// Gain Table Index
SPIWrite	131,00	// Ext LNA, Int LNA, & Mixer Gain Word
SPIWrite	132,00	// TIA & LPF Word
SPIWrite	133,00	// DC Cal bit & Dig Gain Word
SPIWrite	137,1E	// Write Words
SPIWrite	134,00	// Dummy Write to delay 3 ADCCLK/16 cycles
SPIWrite	134,00	// Dummy Write to delay ~1us
SPIWrite	130,56	// Gain Table Index
SPIWrite	131,00	// Ext LNA, Int LNA, & Mixer Gain Word
SPIWrite	132,00	// TIA & LPF Word
SPIWrite	133,00	// DC Cal bit & Dig Gain Word
SPIWrite	137,1E	// Write Words
SPIWrite	134,00	// Dummy Write to delay 3 ADCCLK/16 cycles
SPIWrite	134,00	// Dummy Write to delay ~1us
SPIWrite	130,57	// Gain Table Index
SPIWrite	131,00	// Ext LNA, Int LNA, & Mixer Gain Word
SPIWrite	132,00	// TIA & LPF Word
SPIWrite	133,00	// DC Cal bit & Dig Gain Word
SPIWrite	137,1E	// Write Words
SPIWrite	134,00	// Dummy Write to delay 3 ADCCLK/16 cycles
SPIWrite	134,00	// Dummy Write to delay ~1us
SPIWrite	130,58	// Gain Table Index
SPIWrite	131,00	// Ext LNA, Int LNA, & Mixer Gain Word
SPIWrite	132,00	// TIA & LPF Word
SPIWrite	133,00	// DC Cal bit & Dig Gain Word
SPIWrite	137,1E	// Write Words
SPIWrite	134,00	// Dummy Write to delay 3 ADCCLK/16 cycles
SPIWrite	134,00	// Dummy Write to delay ~1us
SPIWrite	130,59	// Gain Table Index
SPIWrite	131,00	// Ext LNA, Int LNA, & Mixer Gain Word
SPIWrite	132,00	// TIA & LPF Word
SPIWrite	133,00	// DC Cal bit & Dig Gain Word
SPIWrite	137,1E	// Write Words
SPIWrite	134,00	// Dummy Write to delay 3 ADCCLK/16 cycles
SPIWrite	134,00	// Dummy Write to delay ~1us
SPIWrite	130,5A	// Gain Table Index
SPIWrite	131,00	// Ext LNA, Int LNA, & Mixer Gain Word
SPIWrite	132,00	// TIA & LPF Word
SPIWrite	133,00	// DC Cal bit & Dig Gain Word
SPIWrite	137,1E	// Write Words
SPIWrite	134,00	// Dummy Write to delay 3 ADCCLK/16 cycles
SPIWrite	134,00	// Dummy Write to delay ~1us
SPIWrite	137,1A	// Clear Write Bit
SPIWrite	134,00	// Dummy Write to delay ~1us
SPIWrite	134,00	// Dummy Write to delay ~1us
SPIWrite	137,00	// Stop Gain Table Clock
//************************************************************
// Setup Rx Manual Gain Registers
//************************************************************
SPIWrite	0FA,E0	// Gain Control Mode Select
SPIWrite	0FB,08	// Table, Digital Gain, Man Gain Ctrl
SPIWrite	0FC,23	// Incr Step Size, ADC Overrange Size
SPIWrite	0FD,4C	// Max Full/LMT Gain Table Index
SPIWrite	0FE,35	// Decr Step Size, Peak Overload Time
SPIWrite	100,6F	// Max Digital Gain
SPIWrite	103,08	// LMT Detector Settling Time
SPIWrite	104,2D	// ADC Small Overload Threshold
SPIWrite	105,3E	// ADC Large Overload Threshold
SPIWrite	107,26	// Small LMT Overload Threshold
SPIWrite	108,31	// Large LMT Overload Threshold
SPIWrite	109,2A	// Rx1 Full/LMT Gain Index
SPIWrite	10A,58	// Rx1 LPF Gain Index
SPIWrite	10B,00	// Rx1 Digital Gain Index
SPIWrite	10C,2A	// Rx2 Full/LMT Gain Index
SPIWrite	10D,18	// Rx2 LPF Gain Index
SPIWrite	10E,00	// Rx2 Digital Gain Index
SPIWrite	111,0A	// Settling Delay
SPIWrite	114,6A	// Low Power Threshold
SPIWrite	11A,27	// Initial LMT Gain Limit
SPIWrite	081,00	// Tx Symbol Gain Control
//************************************************************
// RX Baseband Filter Tuning (Real BW: 19.900000 MHz) 3dB Filter
// Corner @ 27.860000 MHz)
//************************************************************
SPIWrite	1FB,13	// RX Freq Corner (MHz)
SPIWrite	1FC,73	// RX Freq Corner (Khz)
SPIWrite	1F8,04	// Rx BBF Tune Divider[7:0]
SPIWrite	1F9,1E	// RX BBF Tune Divider[8]

SPIWrite	1D5,3F	// Set Rx Mix LO CM
SPIWrite	1C0,03	// Set GM common mode
SPIWrite	1E2,02	// Enable Rx1 Filter Tuner 
SPIWrite	1E3,02	// Enable Rx2 Filter Tuner 
SPIWrite	016,80	// Start RX Filter Tune
WAIT_CALDONE	RXFILTER,2000	// Wait for RX filter to tune, Max Cal Time: 2.482 us (Done when 0x016[7]==0)

SPIWrite	1E2,03	// Disable Rx Filter Tuner (Rx1)
SPIWrite	1E3,03	// Disable Rx Filter Tuner (Rx2)
//************************************************************
// TX Baseband Filter Tuning (Real BW: 19.900000 MHz) 3dB Filter
// Corner @ 31.840000 MHz)
//************************************************************
SPIWrite	0D6,04	// TX BBF Tune Divider[7:0]
SPIWrite	0D7,1E	// TX BBF Tune Divider[8]

SPIWrite	0CA,22	// Enable Tx Filter Tuner
SPIWrite	016,40	// Start Tx Filter Tune
WAIT_CALDONE	TXFILTER,2000	// Wait for TX filter to tune, Max Cal Time: 1.444 us (Done when 0x016[6]==0)

SPIWrite	0CA,26	// Disable Tx Filter Tuner (Both Channels)
